Backlog/projects/targets.txt

23632 lines
624 KiB
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.{
.arch = .{
"amdgcn",
"arc",
"arm",
"armeb",
"thumb",
"thumbeb",
"aarch64",
"aarch64_be",
"avr",
"bpfel",
"bpfeb",
"csky",
"hexagon",
"kalimba",
"lanai",
"loongarch32",
"loongarch64",
"m68k",
"mips",
"mipsel",
"mips64",
"mips64el",
"msp430",
"nvptx",
"nvptx64",
"powerpc",
"powerpcle",
"powerpc64",
"powerpc64le",
"propeller",
"riscv32",
"riscv64",
"s390x",
"sparc",
"sparc64",
"spirv",
"spirv32",
"spirv64",
"ve",
"wasm32",
"wasm64",
"x86",
"x86_64",
"xcore",
"xtensa",
},
.os = .{
"freestanding",
"other",
"contiki",
"elfiamcu",
"fuchsia",
"hermit",
"aix",
"haiku",
"hurd",
"linux",
"plan9",
"rtems",
"serenity",
"zos",
"dragonfly",
"freebsd",
"netbsd",
"openbsd",
"driverkit",
"ios",
"macos",
"tvos",
"visionos",
"watchos",
"illumos",
"solaris",
"windows",
"uefi",
"ps3",
"ps4",
"ps5",
"emscripten",
"wasi",
"amdhsa",
"amdpal",
"cuda",
"mesa3d",
"nvcl",
"opencl",
"opengl",
"vulkan",
},
.abi = .{
"none",
"gnu",
"gnuabin32",
"gnuabi64",
"gnueabi",
"gnueabihf",
"gnuf32",
"gnusf",
"gnux32",
"gnuilp32",
"code16",
"eabi",
"eabihf",
"ilp32",
"android",
"androideabi",
"musl",
"muslabin32",
"muslabi64",
"musleabi",
"musleabihf",
"muslx32",
"msvc",
"itanium",
"cygnus",
"simulator",
"macabi",
"ohos",
"ohoseabi",
},
.libc = .{
"arc-linux-gnu",
"arm-linux-gnueabi",
"arm-linux-gnueabihf",
"arm-linux-musleabi",
"arm-linux-musleabihf",
"armeb-linux-gnueabi",
"armeb-linux-gnueabihf",
"armeb-linux-musleabi",
"armeb-linux-musleabihf",
"thumb-linux-musleabi",
"thumb-linux-musleabihf",
"thumb-windows-gnu",
"thumbeb-linux-musleabi",
"thumbeb-linux-musleabihf",
"aarch64-linux-gnu",
"aarch64-linux-musl",
"aarch64-macos-none",
"aarch64-windows-gnu",
"aarch64_be-linux-gnu",
"aarch64_be-linux-musl",
"csky-linux-gnueabi",
"csky-linux-gnueabihf",
"loongarch64-linux-gnu",
"loongarch64-linux-gnusf",
"loongarch64-linux-musl",
"m68k-linux-gnu",
"m68k-linux-musl",
"mips-linux-gnueabi",
"mips-linux-gnueabihf",
"mips-linux-musleabi",
"mips-linux-musleabihf",
"mipsel-linux-gnueabi",
"mipsel-linux-gnueabihf",
"mipsel-linux-musleabi",
"mipsel-linux-musleabihf",
"mips64-linux-gnuabi64",
"mips64-linux-gnuabin32",
"mips64-linux-muslabi64",
"mips64-linux-muslabin32",
"mips64el-linux-gnuabi64",
"mips64el-linux-gnuabin32",
"mips64el-linux-muslabi64",
"mips64el-linux-muslabin32",
"powerpc-linux-gnueabi",
"powerpc-linux-gnueabihf",
"powerpc-linux-musleabi",
"powerpc-linux-musleabihf",
"powerpc64-linux-gnu",
"powerpc64-linux-musl",
"powerpc64le-linux-gnu",
"powerpc64le-linux-musl",
"riscv32-linux-gnu",
"riscv32-linux-musl",
"riscv64-linux-gnu",
"riscv64-linux-musl",
"s390x-linux-gnu",
"s390x-linux-musl",
"sparc-linux-gnu",
"sparc64-linux-gnu",
"wasm32-wasi-musl",
"x86-linux-gnu",
"x86-linux-musl",
"x86-windows-gnu",
"x86_64-linux-gnu",
"x86_64-linux-gnux32",
"x86_64-linux-musl",
"x86_64-linux-muslx32",
"x86_64-macos-none",
"x86_64-windows-gnu",
},
.glibc = .{
"2.0.0",
"2.1.0",
"2.1.1",
"2.1.2",
"2.1.3",
"2.2.0",
"2.2.1",
"2.2.2",
"2.2.3",
"2.2.4",
"2.2.5",
"2.2.6",
"2.3.0",
"2.3.2",
"2.3.3",
"2.3.4",
"2.4.0",
"2.5.0",
"2.6.0",
"2.7.0",
"2.8.0",
"2.9.0",
"2.10.0",
"2.11.0",
"2.12.0",
"2.13.0",
"2.14.0",
"2.15.0",
"2.16.0",
"2.17.0",
"2.18.0",
"2.19.0",
"2.20.0",
"2.21.0",
"2.22.0",
"2.23.0",
"2.24.0",
"2.25.0",
"2.26.0",
"2.27.0",
"2.28.0",
"2.29.0",
"2.30.0",
"2.31.0",
"2.32.0",
"2.33.0",
"2.34.0",
"2.35.0",
"2.36.0",
"2.37.0",
"2.38.0",
"2.39.0",
"2.40.0",
"2.41.0",
},
.cpus = .{
.amdgcn = .{
.bonaire = .{
"ldsbankcount32",
"sea_islands",
},
.carrizo = .{
"fast_fmaf",
"half_rate_64_ops",
"ldsbankcount32",
"unpacked_d16_vmem",
"volcanic_islands",
"xnack_support",
},
.fiji = .{
"ldsbankcount32",
"unpacked_d16_vmem",
"volcanic_islands",
},
.generic = .{
"gds",
"gws",
"wavefrontsize64",
},
.generic_hsa = .{
"flat_address_space",
"gds",
"gws",
"wavefrontsize64",
},
.gfx1010 = .{
"back_off_barrier",
"dl_insts",
"ds_src2_insts",
"flat_segment_offset_bug",
"get_wave_id_inst",
"gfx10",
"inst_fwd_prefetch_bug",
"lds_branch_vmem_war_hazard",
"lds_misaligned_bug",
"ldsbankcount32",
"mad_mac_f32_insts",
"negative_unaligned_scratch_offset_bug",
"nsa_clause_bug",
"nsa_encoding",
"nsa_to_vmem_bug",
"offset_3f_bug",
"scalar_atomics",
"scalar_flat_scratch_insts",
"scalar_stores",
"smem_to_vector_write_hazard",
"vcmpx_exec_war_hazard",
"vcmpx_permlane_hazard",
"vmem_to_scalar_write_hazard",
"xnack_support",
},
.gfx1011 = .{
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"ds_src2_insts",
"flat_segment_offset_bug",
"get_wave_id_inst",
"gfx10",
"inst_fwd_prefetch_bug",
"lds_branch_vmem_war_hazard",
"lds_misaligned_bug",
"ldsbankcount32",
"mad_mac_f32_insts",
"negative_unaligned_scratch_offset_bug",
"nsa_clause_bug",
"nsa_encoding",
"nsa_to_vmem_bug",
"offset_3f_bug",
"scalar_atomics",
"scalar_flat_scratch_insts",
"scalar_stores",
"smem_to_vector_write_hazard",
"vcmpx_exec_war_hazard",
"vcmpx_permlane_hazard",
"vmem_to_scalar_write_hazard",
"xnack_support",
},
.gfx1012 = .{
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"ds_src2_insts",
"flat_segment_offset_bug",
"get_wave_id_inst",
"gfx10",
"inst_fwd_prefetch_bug",
"lds_branch_vmem_war_hazard",
"lds_misaligned_bug",
"ldsbankcount32",
"mad_mac_f32_insts",
"negative_unaligned_scratch_offset_bug",
"nsa_clause_bug",
"nsa_encoding",
"nsa_to_vmem_bug",
"offset_3f_bug",
"scalar_atomics",
"scalar_flat_scratch_insts",
"scalar_stores",
"smem_to_vector_write_hazard",
"vcmpx_exec_war_hazard",
"vcmpx_permlane_hazard",
"vmem_to_scalar_write_hazard",
"xnack_support",
},
.gfx1013 = .{
"back_off_barrier",
"dl_insts",
"ds_src2_insts",
"flat_segment_offset_bug",
"get_wave_id_inst",
"gfx10",
"gfx10_a_encoding",
"inst_fwd_prefetch_bug",
"lds_branch_vmem_war_hazard",
"lds_misaligned_bug",
"ldsbankcount32",
"mad_mac_f32_insts",
"negative_unaligned_scratch_offset_bug",
"nsa_clause_bug",
"nsa_encoding",
"nsa_to_vmem_bug",
"offset_3f_bug",
"scalar_atomics",
"scalar_flat_scratch_insts",
"scalar_stores",
"smem_to_vector_write_hazard",
"vcmpx_exec_war_hazard",
"vcmpx_permlane_hazard",
"vmem_to_scalar_write_hazard",
"xnack_support",
},
.gfx1030 = .{
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"gfx10",
"gfx10_3_insts",
"gfx10_a_encoding",
"gfx10_b_encoding",
"ldsbankcount32",
"nsa_encoding",
"shader_cycles_register",
},
.gfx1031 = .{
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"gfx10",
"gfx10_3_insts",
"gfx10_a_encoding",
"gfx10_b_encoding",
"ldsbankcount32",
"nsa_encoding",
"shader_cycles_register",
},
.gfx1032 = .{
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"gfx10",
"gfx10_3_insts",
"gfx10_a_encoding",
"gfx10_b_encoding",
"ldsbankcount32",
"nsa_encoding",
"shader_cycles_register",
},
.gfx1033 = .{
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"gfx10",
"gfx10_3_insts",
"gfx10_a_encoding",
"gfx10_b_encoding",
"ldsbankcount32",
"nsa_encoding",
"shader_cycles_register",
},
.gfx1034 = .{
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"gfx10",
"gfx10_3_insts",
"gfx10_a_encoding",
"gfx10_b_encoding",
"ldsbankcount32",
"nsa_encoding",
"shader_cycles_register",
},
.gfx1035 = .{
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"gfx10",
"gfx10_3_insts",
"gfx10_a_encoding",
"gfx10_b_encoding",
"ldsbankcount32",
"nsa_encoding",
"shader_cycles_register",
},
.gfx1036 = .{
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"gfx10",
"gfx10_3_insts",
"gfx10_a_encoding",
"gfx10_b_encoding",
"ldsbankcount32",
"nsa_encoding",
"shader_cycles_register",
},
.gfx10_1_generic = .{
"back_off_barrier",
"dl_insts",
"ds_src2_insts",
"flat_segment_offset_bug",
"get_wave_id_inst",
"gfx10",
"inst_fwd_prefetch_bug",
"lds_branch_vmem_war_hazard",
"lds_misaligned_bug",
"ldsbankcount32",
"mad_mac_f32_insts",
"negative_unaligned_scratch_offset_bug",
"nsa_clause_bug",
"nsa_encoding",
"nsa_to_vmem_bug",
"offset_3f_bug",
"requires_cov6",
"scalar_atomics",
"scalar_flat_scratch_insts",
"scalar_stores",
"smem_to_vector_write_hazard",
"vcmpx_exec_war_hazard",
"vcmpx_permlane_hazard",
"vmem_to_scalar_write_hazard",
"xnack_support",
},
.gfx10_3_generic = .{
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"gfx10",
"gfx10_3_insts",
"gfx10_a_encoding",
"gfx10_b_encoding",
"ldsbankcount32",
"nsa_encoding",
"requires_cov6",
"shader_cycles_register",
},
.gfx1100 = .{
"allocate1_5xvgprs",
"architected_flat_scratch",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"dl_insts",
"dot10_insts",
"dot5_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"flat_atomic_fadd_f32_inst",
"gfx11",
"image_insts",
"ldsbankcount32",
"mad_intra_fwd_bug",
"memory_atomic_fadd_f32_denormal_support",
"msaa_load_dst_sel_bug",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"priv_enabled_trap2_nop_bug",
"shader_cycles_register",
"user_sgpr_init16_bug",
"valu_trans_use_hazard",
"vcmpx_permlane_hazard",
},
.gfx1101 = .{
"allocate1_5xvgprs",
"architected_flat_scratch",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"dl_insts",
"dot10_insts",
"dot5_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"flat_atomic_fadd_f32_inst",
"gfx11",
"image_insts",
"ldsbankcount32",
"mad_intra_fwd_bug",
"memory_atomic_fadd_f32_denormal_support",
"msaa_load_dst_sel_bug",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"priv_enabled_trap2_nop_bug",
"shader_cycles_register",
"valu_trans_use_hazard",
"vcmpx_permlane_hazard",
},
.gfx1102 = .{
"architected_flat_scratch",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"dl_insts",
"dot10_insts",
"dot5_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"flat_atomic_fadd_f32_inst",
"gfx11",
"image_insts",
"ldsbankcount32",
"mad_intra_fwd_bug",
"memory_atomic_fadd_f32_denormal_support",
"msaa_load_dst_sel_bug",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"priv_enabled_trap2_nop_bug",
"shader_cycles_register",
"user_sgpr_init16_bug",
"valu_trans_use_hazard",
"vcmpx_permlane_hazard",
},
.gfx1103 = .{
"architected_flat_scratch",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"dl_insts",
"dot10_insts",
"dot5_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"flat_atomic_fadd_f32_inst",
"gfx11",
"image_insts",
"ldsbankcount32",
"mad_intra_fwd_bug",
"memory_atomic_fadd_f32_denormal_support",
"msaa_load_dst_sel_bug",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"priv_enabled_trap2_nop_bug",
"shader_cycles_register",
"valu_trans_use_hazard",
"vcmpx_permlane_hazard",
},
.gfx1150 = .{
"architected_flat_scratch",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"dl_insts",
"dot10_insts",
"dot5_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"dpp_src1_sgpr",
"flat_atomic_fadd_f32_inst",
"gfx11",
"image_insts",
"ldsbankcount32",
"memory_atomic_fadd_f32_denormal_support",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"required_export_priority",
"salu_float",
"shader_cycles_register",
"vcmpx_permlane_hazard",
"vgpr_singleuse_hint",
},
.gfx1151 = .{
"allocate1_5xvgprs",
"architected_flat_scratch",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"dl_insts",
"dot10_insts",
"dot5_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"dpp_src1_sgpr",
"flat_atomic_fadd_f32_inst",
"gfx11",
"image_insts",
"ldsbankcount32",
"memory_atomic_fadd_f32_denormal_support",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"required_export_priority",
"salu_float",
"shader_cycles_register",
"vcmpx_permlane_hazard",
"vgpr_singleuse_hint",
},
.gfx1152 = .{
"architected_flat_scratch",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"dl_insts",
"dot10_insts",
"dot5_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"dpp_src1_sgpr",
"flat_atomic_fadd_f32_inst",
"gfx11",
"image_insts",
"ldsbankcount32",
"memory_atomic_fadd_f32_denormal_support",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"required_export_priority",
"salu_float",
"shader_cycles_register",
"vcmpx_permlane_hazard",
"vgpr_singleuse_hint",
},
.gfx11_generic = .{
"architected_flat_scratch",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"dl_insts",
"dot10_insts",
"dot5_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"flat_atomic_fadd_f32_inst",
"gfx11",
"image_insts",
"ldsbankcount32",
"mad_intra_fwd_bug",
"memory_atomic_fadd_f32_denormal_support",
"msaa_load_dst_sel_bug",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"priv_enabled_trap2_nop_bug",
"required_export_priority",
"requires_cov6",
"shader_cycles_register",
"user_sgpr_init16_bug",
"valu_trans_use_hazard",
"vcmpx_permlane_hazard",
},
.gfx1200 = .{
"allocate1_5xvgprs",
"architected_flat_scratch",
"architected_sgprs",
"atomic_buffer_global_pk_add_f16_insts",
"atomic_buffer_pk_add_bf16_inst",
"atomic_ds_pk_add_16_insts",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"atomic_flat_pk_add_16_insts",
"atomic_global_pk_add_bf16_inst",
"dl_insts",
"dot10_insts",
"dot11_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"dpp_src1_sgpr",
"extended_image_insts",
"flat_atomic_fadd_f32_inst",
"fp8_conversion_insts",
"gfx12",
"image_insts",
"ldsbankcount32",
"memory_atomic_fadd_f32_denormal_support",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"pseudo_scalar_trans",
"restricted_soffset",
"salu_float",
"scalar_dwordx3_loads",
"shader_cycles_hi_lo_registers",
"vcmpx_permlane_hazard",
"vgpr_singleuse_hint",
},
.gfx1201 = .{
"allocate1_5xvgprs",
"architected_flat_scratch",
"architected_sgprs",
"atomic_buffer_global_pk_add_f16_insts",
"atomic_buffer_pk_add_bf16_inst",
"atomic_ds_pk_add_16_insts",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"atomic_flat_pk_add_16_insts",
"atomic_global_pk_add_bf16_inst",
"dl_insts",
"dot10_insts",
"dot11_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"dpp_src1_sgpr",
"extended_image_insts",
"flat_atomic_fadd_f32_inst",
"fp8_conversion_insts",
"gfx12",
"image_insts",
"ldsbankcount32",
"memory_atomic_fadd_f32_denormal_support",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"pseudo_scalar_trans",
"restricted_soffset",
"salu_float",
"scalar_dwordx3_loads",
"shader_cycles_hi_lo_registers",
"vcmpx_permlane_hazard",
"vgpr_singleuse_hint",
},
.gfx12_generic = .{
"allocate1_5xvgprs",
"architected_flat_scratch",
"architected_sgprs",
"atomic_buffer_global_pk_add_f16_insts",
"atomic_buffer_pk_add_bf16_inst",
"atomic_ds_pk_add_16_insts",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"atomic_flat_pk_add_16_insts",
"atomic_global_pk_add_bf16_inst",
"dl_insts",
"dot10_insts",
"dot11_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"dpp_src1_sgpr",
"extended_image_insts",
"flat_atomic_fadd_f32_inst",
"fp8_conversion_insts",
"gfx12",
"image_insts",
"ldsbankcount32",
"memory_atomic_fadd_f32_denormal_support",
"nsa_encoding",
"packed_tid",
"partial_nsa_encoding",
"pseudo_scalar_trans",
"requires_cov6",
"restricted_soffset",
"salu_float",
"scalar_dwordx3_loads",
"shader_cycles_hi_lo_registers",
"vcmpx_permlane_hazard",
"vgpr_singleuse_hint",
},
.gfx600 = .{
"fast_fmaf",
"half_rate_64_ops",
"southern_islands",
},
.gfx601 = .{
"southern_islands",
},
.gfx602 = .{
"southern_islands",
},
.gfx700 = .{
"ldsbankcount32",
"sea_islands",
},
.gfx701 = .{
"fast_fmaf",
"half_rate_64_ops",
"ldsbankcount32",
"sea_islands",
},
.gfx702 = .{
"fast_fmaf",
"ldsbankcount16",
"sea_islands",
},
.gfx703 = .{
"ldsbankcount16",
"sea_islands",
},
.gfx704 = .{
"ldsbankcount32",
"sea_islands",
},
.gfx705 = .{
"ldsbankcount16",
"sea_islands",
},
.gfx801 = .{
"fast_fmaf",
"half_rate_64_ops",
"ldsbankcount32",
"unpacked_d16_vmem",
"volcanic_islands",
"xnack_support",
},
.gfx802 = .{
"ldsbankcount32",
"sgpr_init_bug",
"unpacked_d16_vmem",
"volcanic_islands",
},
.gfx803 = .{
"ldsbankcount32",
"unpacked_d16_vmem",
"volcanic_islands",
},
.gfx805 = .{
"ldsbankcount32",
"sgpr_init_bug",
"unpacked_d16_vmem",
"volcanic_islands",
},
.gfx810 = .{
"image_gather4_d16_bug",
"image_store_d16_bug",
"ldsbankcount16",
"volcanic_islands",
"xnack_support",
},
.gfx900 = .{
"ds_src2_insts",
"extended_image_insts",
"gds",
"gfx9",
"image_gather4_d16_bug",
"image_insts",
"ldsbankcount32",
"mad_mac_f32_insts",
"mad_mix_insts",
},
.gfx902 = .{
"ds_src2_insts",
"extended_image_insts",
"gds",
"gfx9",
"image_gather4_d16_bug",
"image_insts",
"ldsbankcount32",
"mad_mac_f32_insts",
"mad_mix_insts",
},
.gfx904 = .{
"ds_src2_insts",
"extended_image_insts",
"fma_mix_insts",
"gds",
"gfx9",
"image_gather4_d16_bug",
"image_insts",
"ldsbankcount32",
"mad_mac_f32_insts",
},
.gfx906 = .{
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot7_insts",
"ds_src2_insts",
"extended_image_insts",
"fma_mix_insts",
"gds",
"gfx9",
"half_rate_64_ops",
"image_gather4_d16_bug",
"image_insts",
"ldsbankcount32",
"mad_mac_f32_insts",
"sramecc_support",
},
.gfx908 = .{
"atomic_buffer_global_pk_add_f16_no_rtn_insts",
"atomic_fadd_no_rtn_insts",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot3_insts",
"dot4_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"ds_src2_insts",
"extended_image_insts",
"fma_mix_insts",
"gds",
"gfx9",
"half_rate_64_ops",
"image_gather4_d16_bug",
"image_insts",
"ldsbankcount32",
"mad_mac_f32_insts",
"mai_insts",
"mfma_inline_literal_bug",
"pk_fmac_f16_inst",
"sramecc_support",
},
.gfx909 = .{
"ds_src2_insts",
"extended_image_insts",
"gds",
"gfx9",
"image_gather4_d16_bug",
"image_insts",
"ldsbankcount32",
"mad_mac_f32_insts",
"mad_mix_insts",
},
.gfx90a = .{
"atomic_buffer_global_pk_add_f16_insts",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"atomic_fmin_fmax_flat_f64",
"atomic_fmin_fmax_global_f64",
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot3_insts",
"dot4_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"dpp_64bit",
"flat_buffer_global_fadd_f64_inst",
"fma_mix_insts",
"fmacf64_inst",
"full_rate_64_ops",
"gfx9",
"gfx90a_insts",
"image_insts",
"kernarg_preload",
"ldsbankcount32",
"mad_mac_f32_insts",
"mai_insts",
"packed_fp32_ops",
"packed_tid",
"pk_fmac_f16_inst",
"sramecc_support",
},
.gfx90c = .{
"ds_src2_insts",
"extended_image_insts",
"gds",
"gfx9",
"image_gather4_d16_bug",
"image_insts",
"ldsbankcount32",
"mad_mac_f32_insts",
"mad_mix_insts",
},
.gfx940 = .{
"agent_scope_fine_grained_remote_memory_atomics",
"architected_flat_scratch",
"atomic_buffer_global_pk_add_f16_insts",
"atomic_ds_pk_add_16_insts",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"atomic_flat_pk_add_16_insts",
"atomic_fmin_fmax_flat_f64",
"atomic_fmin_fmax_global_f64",
"atomic_global_pk_add_bf16_inst",
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot3_insts",
"dot4_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"dpp_64bit",
"flat_atomic_fadd_f32_inst",
"flat_buffer_global_fadd_f64_inst",
"fma_mix_insts",
"fmacf64_inst",
"force_store_sc0_sc1",
"fp8_conversion_insts",
"fp8_insts",
"full_rate_64_ops",
"gfx9",
"gfx90a_insts",
"gfx940_insts",
"kernarg_preload",
"ldsbankcount32",
"mai_insts",
"memory_atomic_fadd_f32_denormal_support",
"packed_fp32_ops",
"packed_tid",
"pk_fmac_f16_inst",
"sramecc_support",
},
.gfx941 = .{
"agent_scope_fine_grained_remote_memory_atomics",
"architected_flat_scratch",
"atomic_buffer_global_pk_add_f16_insts",
"atomic_ds_pk_add_16_insts",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"atomic_flat_pk_add_16_insts",
"atomic_fmin_fmax_flat_f64",
"atomic_fmin_fmax_global_f64",
"atomic_global_pk_add_bf16_inst",
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot3_insts",
"dot4_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"dpp_64bit",
"flat_atomic_fadd_f32_inst",
"flat_buffer_global_fadd_f64_inst",
"fma_mix_insts",
"fmacf64_inst",
"force_store_sc0_sc1",
"fp8_conversion_insts",
"fp8_insts",
"full_rate_64_ops",
"gfx9",
"gfx90a_insts",
"gfx940_insts",
"kernarg_preload",
"ldsbankcount32",
"mai_insts",
"memory_atomic_fadd_f32_denormal_support",
"packed_fp32_ops",
"packed_tid",
"pk_fmac_f16_inst",
"sramecc_support",
},
.gfx942 = .{
"agent_scope_fine_grained_remote_memory_atomics",
"architected_flat_scratch",
"atomic_buffer_global_pk_add_f16_insts",
"atomic_ds_pk_add_16_insts",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"atomic_flat_pk_add_16_insts",
"atomic_fmin_fmax_flat_f64",
"atomic_fmin_fmax_global_f64",
"atomic_global_pk_add_bf16_inst",
"back_off_barrier",
"dl_insts",
"dot10_insts",
"dot1_insts",
"dot2_insts",
"dot3_insts",
"dot4_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"dpp_64bit",
"flat_atomic_fadd_f32_inst",
"flat_buffer_global_fadd_f64_inst",
"fma_mix_insts",
"fmacf64_inst",
"fp8_conversion_insts",
"fp8_insts",
"full_rate_64_ops",
"gfx9",
"gfx90a_insts",
"gfx940_insts",
"kernarg_preload",
"ldsbankcount32",
"mai_insts",
"memory_atomic_fadd_f32_denormal_support",
"packed_fp32_ops",
"packed_tid",
"pk_fmac_f16_inst",
"sramecc_support",
},
.gfx9_generic = .{
"ds_src2_insts",
"extended_image_insts",
"gds",
"gfx9",
"image_gather4_d16_bug",
"image_insts",
"ldsbankcount32",
"mad_mac_f32_insts",
"requires_cov6",
},
.hainan = .{
"southern_islands",
},
.hawaii = .{
"fast_fmaf",
"half_rate_64_ops",
"ldsbankcount32",
"sea_islands",
},
.iceland = .{
"ldsbankcount32",
"sgpr_init_bug",
"unpacked_d16_vmem",
"volcanic_islands",
},
.kabini = .{
"ldsbankcount16",
"sea_islands",
},
.kaveri = .{
"ldsbankcount32",
"sea_islands",
},
.mullins = .{
"ldsbankcount16",
"sea_islands",
},
.oland = .{
"southern_islands",
},
.pitcairn = .{
"southern_islands",
},
.polaris10 = .{
"ldsbankcount32",
"unpacked_d16_vmem",
"volcanic_islands",
},
.polaris11 = .{
"ldsbankcount32",
"unpacked_d16_vmem",
"volcanic_islands",
},
.stoney = .{
"image_gather4_d16_bug",
"image_store_d16_bug",
"ldsbankcount16",
"volcanic_islands",
"xnack_support",
},
.tahiti = .{
"fast_fmaf",
"half_rate_64_ops",
"southern_islands",
},
.tonga = .{
"ldsbankcount32",
"sgpr_init_bug",
"unpacked_d16_vmem",
"volcanic_islands",
},
.tongapro = .{
"ldsbankcount32",
"sgpr_init_bug",
"unpacked_d16_vmem",
"volcanic_islands",
},
.verde = .{
"southern_islands",
},
},
.arc = .{
.generic = .{},
},
.arm = .{
.arm1020e = .{
"v5te",
},
.arm1020t = .{
"v5t",
},
.arm1022e = .{
"v5te",
},
.arm10e = .{
"v5te",
},
.arm10tdmi = .{
"v5t",
},
.arm1136j_s = .{
"v6",
},
.arm1136jf_s = .{
"slowfpvmlx",
"v6",
"vfp2",
},
.arm1156t2_s = .{
"v6t2",
},
.arm1156t2f_s = .{
"slowfpvmlx",
"v6t2",
"vfp2",
},
.arm1176jz_s = .{
"v6kz",
},
.arm1176jzf_s = .{
"slowfpvmlx",
"v6kz",
"vfp2",
},
.arm710t = .{
"v4t",
},
.arm720t = .{
"v4t",
},
.arm7tdmi = .{
"v4t",
},
.arm7tdmi_s = .{
"v4t",
},
.arm8 = .{
"v4",
},
.arm810 = .{
"v4",
},
.arm9 = .{
"v4t",
},
.arm920 = .{
"v4t",
},
.arm920t = .{
"v4t",
},
.arm922t = .{
"v4t",
},
.arm926ej_s = .{
"v5te",
},
.arm940t = .{
"v4t",
},
.arm946e_s = .{
"v5te",
},
.arm966e_s = .{
"v5te",
},
.arm968e_s = .{
"v5te",
},
.arm9e = .{
"v5te",
},
.arm9tdmi = .{
"v4t",
},
.baseline = .{
"v7a",
},
.cortex_a12 = .{
"avoid_partial_cpsr",
"mp",
"ret_addr_stack",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
},
.cortex_a15 = .{
"avoid_partial_cpsr",
"mp",
"muxed_units",
"ret_addr_stack",
"splat_vfp_neon",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vldn_align",
},
.cortex_a17 = .{
"avoid_partial_cpsr",
"mp",
"ret_addr_stack",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
},
.cortex_a32 = .{
"v8a",
},
.cortex_a35 = .{
"v8a",
},
.cortex_a5 = .{
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vfp4",
"vmlx_forwarding",
},
.cortex_a53 = .{
"fpao",
"v8a",
},
.cortex_a55 = .{
"dotprod",
"v8_2a",
},
.cortex_a57 = .{
"avoid_partial_cpsr",
"cheap_predicable_cpsr",
"fix_cortex_a57_aes_1742098",
"fpao",
"v8a",
},
.cortex_a7 = .{
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_a710 = .{
"bf16",
"fp16fml",
"i8mm",
"v9a",
},
.cortex_a72 = .{
"fix_cortex_a57_aes_1742098",
"v8a",
},
.cortex_a73 = .{
"v8a",
},
.cortex_a75 = .{
"dotprod",
"v8_2a",
},
.cortex_a76 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a76ae = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a77 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78ae = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78c = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a8 = .{
"nonpipelined_vfp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_a9 = .{
"avoid_partial_cpsr",
"expand_fp_mlx",
"fp16",
"mp",
"muxed_units",
"neon_fpmovs",
"prefer_vmovsr",
"ret_addr_stack",
"trustzone",
"v7a",
"vldn_align",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_m0 = .{
"no_branch_predictor",
"v6m",
},
.cortex_m0plus = .{
"no_branch_predictor",
"v6m",
},
.cortex_m1 = .{
"no_branch_predictor",
"v6m",
},
.cortex_m23 = .{
"no_branch_predictor",
"no_movt",
"v8m",
},
.cortex_m3 = .{
"loop_align",
"no_branch_predictor",
"use_misched",
"v7m",
},
.cortex_m33 = .{
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8m_main",
},
.cortex_m35p = .{
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8m_main",
},
.cortex_m4 = .{
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v7em",
},
.cortex_m52 = .{
"fp_armv8d16",
"loop_align",
"mve1beat",
"mve_fp",
"no_branch_predictor",
"pacbti",
"slowfpvmlx",
"use_misched",
"v8_1m_main",
},
.cortex_m55 = .{
"dsp",
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvmlx",
"use_misched",
"v8_1m_main",
},
.cortex_m7 = .{
"use_mipipeliner",
"use_misched",
"v7em",
},
.cortex_m85 = .{
"dsp",
"use_misched",
"v8_1m_main",
},
.cortex_r4 = .{
"avoid_partial_cpsr",
"ret_addr_stack",
"v7r",
},
.cortex_r4f = .{
"avoid_partial_cpsr",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r5 = .{
"avoid_partial_cpsr",
"hwdiv_arm",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r52 = .{
"fp_armv8",
"fpao",
"neon",
"use_misched",
"v8r",
},
.cortex_r52plus = .{
"fp_armv8",
"fpao",
"neon",
"use_misched",
"v8r",
},
.cortex_r7 = .{
"avoid_partial_cpsr",
"fp16",
"hwdiv_arm",
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r8 = .{
"avoid_partial_cpsr",
"fp16",
"hwdiv_arm",
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_x1 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_x1c = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cyclone = .{
"avoid_movs_shop",
"avoid_partial_cpsr",
"disable_postra_scheduler",
"neonfp",
"ret_addr_stack",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8a",
"zcz",
},
.ep9312 = .{
"v4t",
},
.exynos_m1 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m2 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m3 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m4 = .{
"dotprod",
"expand_fp_mlx",
"fullfp16",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8_2a",
"wide_stride_vfp",
"zcz",
},
.exynos_m5 = .{
"dotprod",
"expand_fp_mlx",
"fullfp16",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8_2a",
"wide_stride_vfp",
"zcz",
},
.generic = .{},
.iwmmxt = .{
"v5te",
},
.krait = .{
"avoid_partial_cpsr",
"hwdiv",
"hwdiv_arm",
"muxed_units",
"ret_addr_stack",
"v7a",
"vfp4",
"vldn_align",
"vmlx_forwarding",
},
.kryo = .{
"v8a",
},
.mpcore = .{
"slowfpvmlx",
"v6k",
"vfp2",
},
.mpcorenovfp = .{
"v6k",
},
.neoverse_n1 = .{
"dotprod",
"v8_2a",
},
.neoverse_n2 = .{
"bf16",
"fp16fml",
"i8mm",
"v9a",
},
.neoverse_v1 = .{
"bf16",
"fullfp16",
"i8mm",
"v8_4a",
},
.sc000 = .{
"no_branch_predictor",
"v6m",
},
.sc300 = .{
"no_branch_predictor",
"use_misched",
"v7m",
},
.strongarm = .{
"v4",
},
.strongarm110 = .{
"v4",
},
.strongarm1100 = .{
"v4",
},
.strongarm1110 = .{
"v4",
},
.swift = .{
"avoid_movs_shop",
"avoid_partial_cpsr",
"disable_postra_scheduler",
"hwdiv",
"hwdiv_arm",
"mp",
"neonfp",
"prefer_ishst",
"prof_unpr",
"ret_addr_stack",
"slow_load_D_subreg",
"slow_odd_reg",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v7a",
"vfp4",
"vmlx_hazards",
"wide_stride_vfp",
},
.xscale = .{
"v5te",
},
},
.armeb = .{
.arm1020e = .{
"v5te",
},
.arm1020t = .{
"v5t",
},
.arm1022e = .{
"v5te",
},
.arm10e = .{
"v5te",
},
.arm10tdmi = .{
"v5t",
},
.arm1136j_s = .{
"v6",
},
.arm1136jf_s = .{
"slowfpvmlx",
"v6",
"vfp2",
},
.arm1156t2_s = .{
"v6t2",
},
.arm1156t2f_s = .{
"slowfpvmlx",
"v6t2",
"vfp2",
},
.arm1176jz_s = .{
"v6kz",
},
.arm1176jzf_s = .{
"slowfpvmlx",
"v6kz",
"vfp2",
},
.arm710t = .{
"v4t",
},
.arm720t = .{
"v4t",
},
.arm7tdmi = .{
"v4t",
},
.arm7tdmi_s = .{
"v4t",
},
.arm8 = .{
"v4",
},
.arm810 = .{
"v4",
},
.arm9 = .{
"v4t",
},
.arm920 = .{
"v4t",
},
.arm920t = .{
"v4t",
},
.arm922t = .{
"v4t",
},
.arm926ej_s = .{
"v5te",
},
.arm940t = .{
"v4t",
},
.arm946e_s = .{
"v5te",
},
.arm966e_s = .{
"v5te",
},
.arm968e_s = .{
"v5te",
},
.arm9e = .{
"v5te",
},
.arm9tdmi = .{
"v4t",
},
.baseline = .{
"v7a",
},
.cortex_a12 = .{
"avoid_partial_cpsr",
"mp",
"ret_addr_stack",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
},
.cortex_a15 = .{
"avoid_partial_cpsr",
"mp",
"muxed_units",
"ret_addr_stack",
"splat_vfp_neon",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vldn_align",
},
.cortex_a17 = .{
"avoid_partial_cpsr",
"mp",
"ret_addr_stack",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
},
.cortex_a32 = .{
"v8a",
},
.cortex_a35 = .{
"v8a",
},
.cortex_a5 = .{
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vfp4",
"vmlx_forwarding",
},
.cortex_a53 = .{
"fpao",
"v8a",
},
.cortex_a55 = .{
"dotprod",
"v8_2a",
},
.cortex_a57 = .{
"avoid_partial_cpsr",
"cheap_predicable_cpsr",
"fix_cortex_a57_aes_1742098",
"fpao",
"v8a",
},
.cortex_a7 = .{
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_a710 = .{
"bf16",
"fp16fml",
"i8mm",
"v9a",
},
.cortex_a72 = .{
"fix_cortex_a57_aes_1742098",
"v8a",
},
.cortex_a73 = .{
"v8a",
},
.cortex_a75 = .{
"dotprod",
"v8_2a",
},
.cortex_a76 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a76ae = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a77 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78ae = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78c = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a8 = .{
"nonpipelined_vfp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_a9 = .{
"avoid_partial_cpsr",
"expand_fp_mlx",
"fp16",
"mp",
"muxed_units",
"neon_fpmovs",
"prefer_vmovsr",
"ret_addr_stack",
"trustzone",
"v7a",
"vldn_align",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_m0 = .{
"no_branch_predictor",
"v6m",
},
.cortex_m0plus = .{
"no_branch_predictor",
"v6m",
},
.cortex_m1 = .{
"no_branch_predictor",
"v6m",
},
.cortex_m23 = .{
"no_branch_predictor",
"no_movt",
"v8m",
},
.cortex_m3 = .{
"loop_align",
"no_branch_predictor",
"use_misched",
"v7m",
},
.cortex_m33 = .{
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8m_main",
},
.cortex_m35p = .{
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8m_main",
},
.cortex_m4 = .{
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v7em",
},
.cortex_m52 = .{
"fp_armv8d16",
"loop_align",
"mve1beat",
"mve_fp",
"no_branch_predictor",
"pacbti",
"slowfpvmlx",
"use_misched",
"v8_1m_main",
},
.cortex_m55 = .{
"dsp",
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvmlx",
"use_misched",
"v8_1m_main",
},
.cortex_m7 = .{
"use_mipipeliner",
"use_misched",
"v7em",
},
.cortex_m85 = .{
"dsp",
"use_misched",
"v8_1m_main",
},
.cortex_r4 = .{
"avoid_partial_cpsr",
"ret_addr_stack",
"v7r",
},
.cortex_r4f = .{
"avoid_partial_cpsr",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r5 = .{
"avoid_partial_cpsr",
"hwdiv_arm",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r52 = .{
"fp_armv8",
"fpao",
"neon",
"use_misched",
"v8r",
},
.cortex_r52plus = .{
"fp_armv8",
"fpao",
"neon",
"use_misched",
"v8r",
},
.cortex_r7 = .{
"avoid_partial_cpsr",
"fp16",
"hwdiv_arm",
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r8 = .{
"avoid_partial_cpsr",
"fp16",
"hwdiv_arm",
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_x1 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_x1c = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cyclone = .{
"avoid_movs_shop",
"avoid_partial_cpsr",
"disable_postra_scheduler",
"neonfp",
"ret_addr_stack",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8a",
"zcz",
},
.ep9312 = .{
"v4t",
},
.exynos_m1 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m2 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m3 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m4 = .{
"dotprod",
"expand_fp_mlx",
"fullfp16",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8_2a",
"wide_stride_vfp",
"zcz",
},
.exynos_m5 = .{
"dotprod",
"expand_fp_mlx",
"fullfp16",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8_2a",
"wide_stride_vfp",
"zcz",
},
.generic = .{},
.iwmmxt = .{
"v5te",
},
.krait = .{
"avoid_partial_cpsr",
"hwdiv",
"hwdiv_arm",
"muxed_units",
"ret_addr_stack",
"v7a",
"vfp4",
"vldn_align",
"vmlx_forwarding",
},
.kryo = .{
"v8a",
},
.mpcore = .{
"slowfpvmlx",
"v6k",
"vfp2",
},
.mpcorenovfp = .{
"v6k",
},
.neoverse_n1 = .{
"dotprod",
"v8_2a",
},
.neoverse_n2 = .{
"bf16",
"fp16fml",
"i8mm",
"v9a",
},
.neoverse_v1 = .{
"bf16",
"fullfp16",
"i8mm",
"v8_4a",
},
.sc000 = .{
"no_branch_predictor",
"v6m",
},
.sc300 = .{
"no_branch_predictor",
"use_misched",
"v7m",
},
.strongarm = .{
"v4",
},
.strongarm110 = .{
"v4",
},
.strongarm1100 = .{
"v4",
},
.strongarm1110 = .{
"v4",
},
.swift = .{
"avoid_movs_shop",
"avoid_partial_cpsr",
"disable_postra_scheduler",
"hwdiv",
"hwdiv_arm",
"mp",
"neonfp",
"prefer_ishst",
"prof_unpr",
"ret_addr_stack",
"slow_load_D_subreg",
"slow_odd_reg",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v7a",
"vfp4",
"vmlx_hazards",
"wide_stride_vfp",
},
.xscale = .{
"v5te",
},
},
.thumb = .{
.arm1020e = .{
"v5te",
},
.arm1020t = .{
"v5t",
},
.arm1022e = .{
"v5te",
},
.arm10e = .{
"v5te",
},
.arm10tdmi = .{
"v5t",
},
.arm1136j_s = .{
"v6",
},
.arm1136jf_s = .{
"slowfpvmlx",
"v6",
"vfp2",
},
.arm1156t2_s = .{
"v6t2",
},
.arm1156t2f_s = .{
"slowfpvmlx",
"v6t2",
"vfp2",
},
.arm1176jz_s = .{
"v6kz",
},
.arm1176jzf_s = .{
"slowfpvmlx",
"v6kz",
"vfp2",
},
.arm710t = .{
"v4t",
},
.arm720t = .{
"v4t",
},
.arm7tdmi = .{
"v4t",
},
.arm7tdmi_s = .{
"v4t",
},
.arm8 = .{
"v4",
},
.arm810 = .{
"v4",
},
.arm9 = .{
"v4t",
},
.arm920 = .{
"v4t",
},
.arm920t = .{
"v4t",
},
.arm922t = .{
"v4t",
},
.arm926ej_s = .{
"v5te",
},
.arm940t = .{
"v4t",
},
.arm946e_s = .{
"v5te",
},
.arm966e_s = .{
"v5te",
},
.arm968e_s = .{
"v5te",
},
.arm9e = .{
"v5te",
},
.arm9tdmi = .{
"v4t",
},
.baseline = .{
"v7a",
},
.cortex_a12 = .{
"avoid_partial_cpsr",
"mp",
"ret_addr_stack",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
},
.cortex_a15 = .{
"avoid_partial_cpsr",
"mp",
"muxed_units",
"ret_addr_stack",
"splat_vfp_neon",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vldn_align",
},
.cortex_a17 = .{
"avoid_partial_cpsr",
"mp",
"ret_addr_stack",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
},
.cortex_a32 = .{
"v8a",
},
.cortex_a35 = .{
"v8a",
},
.cortex_a5 = .{
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vfp4",
"vmlx_forwarding",
},
.cortex_a53 = .{
"fpao",
"v8a",
},
.cortex_a55 = .{
"dotprod",
"v8_2a",
},
.cortex_a57 = .{
"avoid_partial_cpsr",
"cheap_predicable_cpsr",
"fix_cortex_a57_aes_1742098",
"fpao",
"v8a",
},
.cortex_a7 = .{
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_a710 = .{
"bf16",
"fp16fml",
"i8mm",
"v9a",
},
.cortex_a72 = .{
"fix_cortex_a57_aes_1742098",
"v8a",
},
.cortex_a73 = .{
"v8a",
},
.cortex_a75 = .{
"dotprod",
"v8_2a",
},
.cortex_a76 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a76ae = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a77 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78ae = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78c = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a8 = .{
"nonpipelined_vfp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_a9 = .{
"avoid_partial_cpsr",
"expand_fp_mlx",
"fp16",
"mp",
"muxed_units",
"neon_fpmovs",
"prefer_vmovsr",
"ret_addr_stack",
"trustzone",
"v7a",
"vldn_align",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_m0 = .{
"no_branch_predictor",
"v6m",
},
.cortex_m0plus = .{
"no_branch_predictor",
"v6m",
},
.cortex_m1 = .{
"no_branch_predictor",
"v6m",
},
.cortex_m23 = .{
"no_branch_predictor",
"no_movt",
"v8m",
},
.cortex_m3 = .{
"loop_align",
"no_branch_predictor",
"use_misched",
"v7m",
},
.cortex_m33 = .{
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8m_main",
},
.cortex_m35p = .{
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8m_main",
},
.cortex_m4 = .{
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v7em",
},
.cortex_m52 = .{
"fp_armv8d16",
"loop_align",
"mve1beat",
"mve_fp",
"no_branch_predictor",
"pacbti",
"slowfpvmlx",
"use_misched",
"v8_1m_main",
},
.cortex_m55 = .{
"dsp",
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvmlx",
"use_misched",
"v8_1m_main",
},
.cortex_m7 = .{
"use_mipipeliner",
"use_misched",
"v7em",
},
.cortex_m85 = .{
"dsp",
"use_misched",
"v8_1m_main",
},
.cortex_r4 = .{
"avoid_partial_cpsr",
"ret_addr_stack",
"v7r",
},
.cortex_r4f = .{
"avoid_partial_cpsr",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r5 = .{
"avoid_partial_cpsr",
"hwdiv_arm",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r52 = .{
"fp_armv8",
"fpao",
"neon",
"use_misched",
"v8r",
},
.cortex_r52plus = .{
"fp_armv8",
"fpao",
"neon",
"use_misched",
"v8r",
},
.cortex_r7 = .{
"avoid_partial_cpsr",
"fp16",
"hwdiv_arm",
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r8 = .{
"avoid_partial_cpsr",
"fp16",
"hwdiv_arm",
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_x1 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_x1c = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cyclone = .{
"avoid_movs_shop",
"avoid_partial_cpsr",
"disable_postra_scheduler",
"neonfp",
"ret_addr_stack",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8a",
"zcz",
},
.ep9312 = .{
"v4t",
},
.exynos_m1 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m2 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m3 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m4 = .{
"dotprod",
"expand_fp_mlx",
"fullfp16",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8_2a",
"wide_stride_vfp",
"zcz",
},
.exynos_m5 = .{
"dotprod",
"expand_fp_mlx",
"fullfp16",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8_2a",
"wide_stride_vfp",
"zcz",
},
.generic = .{},
.iwmmxt = .{
"v5te",
},
.krait = .{
"avoid_partial_cpsr",
"hwdiv",
"hwdiv_arm",
"muxed_units",
"ret_addr_stack",
"v7a",
"vfp4",
"vldn_align",
"vmlx_forwarding",
},
.kryo = .{
"v8a",
},
.mpcore = .{
"slowfpvmlx",
"v6k",
"vfp2",
},
.mpcorenovfp = .{
"v6k",
},
.neoverse_n1 = .{
"dotprod",
"v8_2a",
},
.neoverse_n2 = .{
"bf16",
"fp16fml",
"i8mm",
"v9a",
},
.neoverse_v1 = .{
"bf16",
"fullfp16",
"i8mm",
"v8_4a",
},
.sc000 = .{
"no_branch_predictor",
"v6m",
},
.sc300 = .{
"no_branch_predictor",
"use_misched",
"v7m",
},
.strongarm = .{
"v4",
},
.strongarm110 = .{
"v4",
},
.strongarm1100 = .{
"v4",
},
.strongarm1110 = .{
"v4",
},
.swift = .{
"avoid_movs_shop",
"avoid_partial_cpsr",
"disable_postra_scheduler",
"hwdiv",
"hwdiv_arm",
"mp",
"neonfp",
"prefer_ishst",
"prof_unpr",
"ret_addr_stack",
"slow_load_D_subreg",
"slow_odd_reg",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v7a",
"vfp4",
"vmlx_hazards",
"wide_stride_vfp",
},
.xscale = .{
"v5te",
},
},
.thumbeb = .{
.arm1020e = .{
"v5te",
},
.arm1020t = .{
"v5t",
},
.arm1022e = .{
"v5te",
},
.arm10e = .{
"v5te",
},
.arm10tdmi = .{
"v5t",
},
.arm1136j_s = .{
"v6",
},
.arm1136jf_s = .{
"slowfpvmlx",
"v6",
"vfp2",
},
.arm1156t2_s = .{
"v6t2",
},
.arm1156t2f_s = .{
"slowfpvmlx",
"v6t2",
"vfp2",
},
.arm1176jz_s = .{
"v6kz",
},
.arm1176jzf_s = .{
"slowfpvmlx",
"v6kz",
"vfp2",
},
.arm710t = .{
"v4t",
},
.arm720t = .{
"v4t",
},
.arm7tdmi = .{
"v4t",
},
.arm7tdmi_s = .{
"v4t",
},
.arm8 = .{
"v4",
},
.arm810 = .{
"v4",
},
.arm9 = .{
"v4t",
},
.arm920 = .{
"v4t",
},
.arm920t = .{
"v4t",
},
.arm922t = .{
"v4t",
},
.arm926ej_s = .{
"v5te",
},
.arm940t = .{
"v4t",
},
.arm946e_s = .{
"v5te",
},
.arm966e_s = .{
"v5te",
},
.arm968e_s = .{
"v5te",
},
.arm9e = .{
"v5te",
},
.arm9tdmi = .{
"v4t",
},
.baseline = .{
"v7a",
},
.cortex_a12 = .{
"avoid_partial_cpsr",
"mp",
"ret_addr_stack",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
},
.cortex_a15 = .{
"avoid_partial_cpsr",
"mp",
"muxed_units",
"ret_addr_stack",
"splat_vfp_neon",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vldn_align",
},
.cortex_a17 = .{
"avoid_partial_cpsr",
"mp",
"ret_addr_stack",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
},
.cortex_a32 = .{
"v8a",
},
.cortex_a35 = .{
"v8a",
},
.cortex_a5 = .{
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vfp4",
"vmlx_forwarding",
},
.cortex_a53 = .{
"fpao",
"v8a",
},
.cortex_a55 = .{
"dotprod",
"v8_2a",
},
.cortex_a57 = .{
"avoid_partial_cpsr",
"cheap_predicable_cpsr",
"fix_cortex_a57_aes_1742098",
"fpao",
"v8a",
},
.cortex_a7 = .{
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vfp4",
"virtualization",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_a710 = .{
"bf16",
"fp16fml",
"i8mm",
"v9a",
},
.cortex_a72 = .{
"fix_cortex_a57_aes_1742098",
"v8a",
},
.cortex_a73 = .{
"v8a",
},
.cortex_a75 = .{
"dotprod",
"v8_2a",
},
.cortex_a76 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a76ae = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a77 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78ae = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a78c = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_a8 = .{
"nonpipelined_vfp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"trustzone",
"v7a",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_a9 = .{
"avoid_partial_cpsr",
"expand_fp_mlx",
"fp16",
"mp",
"muxed_units",
"neon_fpmovs",
"prefer_vmovsr",
"ret_addr_stack",
"trustzone",
"v7a",
"vldn_align",
"vmlx_forwarding",
"vmlx_hazards",
},
.cortex_m0 = .{
"no_branch_predictor",
"v6m",
},
.cortex_m0plus = .{
"no_branch_predictor",
"v6m",
},
.cortex_m1 = .{
"no_branch_predictor",
"v6m",
},
.cortex_m23 = .{
"no_branch_predictor",
"no_movt",
"v8m",
},
.cortex_m3 = .{
"loop_align",
"no_branch_predictor",
"use_misched",
"v7m",
},
.cortex_m33 = .{
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8m_main",
},
.cortex_m35p = .{
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8m_main",
},
.cortex_m4 = .{
"loop_align",
"no_branch_predictor",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v7em",
},
.cortex_m52 = .{
"fp_armv8d16",
"loop_align",
"mve1beat",
"mve_fp",
"no_branch_predictor",
"pacbti",
"slowfpvmlx",
"use_misched",
"v8_1m_main",
},
.cortex_m55 = .{
"dsp",
"fix_cmse_cve_2021_35465",
"loop_align",
"no_branch_predictor",
"slowfpvmlx",
"use_misched",
"v8_1m_main",
},
.cortex_m7 = .{
"use_mipipeliner",
"use_misched",
"v7em",
},
.cortex_m85 = .{
"dsp",
"use_misched",
"v8_1m_main",
},
.cortex_r4 = .{
"avoid_partial_cpsr",
"ret_addr_stack",
"v7r",
},
.cortex_r4f = .{
"avoid_partial_cpsr",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r5 = .{
"avoid_partial_cpsr",
"hwdiv_arm",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r52 = .{
"fp_armv8",
"fpao",
"neon",
"use_misched",
"v8r",
},
.cortex_r52plus = .{
"fp_armv8",
"fpao",
"neon",
"use_misched",
"v8r",
},
.cortex_r7 = .{
"avoid_partial_cpsr",
"fp16",
"hwdiv_arm",
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_r8 = .{
"avoid_partial_cpsr",
"fp16",
"hwdiv_arm",
"mp",
"ret_addr_stack",
"slow_fp_brcc",
"slowfpvfmx",
"slowfpvmlx",
"v7r",
"vfp3d16",
},
.cortex_x1 = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cortex_x1c = .{
"dotprod",
"fullfp16",
"v8_2a",
},
.cyclone = .{
"avoid_movs_shop",
"avoid_partial_cpsr",
"disable_postra_scheduler",
"neonfp",
"ret_addr_stack",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v8a",
"zcz",
},
.ep9312 = .{
"v4t",
},
.exynos_m1 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m2 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m3 = .{
"expand_fp_mlx",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8a",
"wide_stride_vfp",
"zcz",
},
.exynos_m4 = .{
"dotprod",
"expand_fp_mlx",
"fullfp16",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8_2a",
"wide_stride_vfp",
"zcz",
},
.exynos_m5 = .{
"dotprod",
"expand_fp_mlx",
"fullfp16",
"fuse_aes",
"fuse_literals",
"prof_unpr",
"ret_addr_stack",
"slow_fp_brcc",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"splat_vfp_neon",
"v8_2a",
"wide_stride_vfp",
"zcz",
},
.generic = .{},
.iwmmxt = .{
"v5te",
},
.krait = .{
"avoid_partial_cpsr",
"hwdiv",
"hwdiv_arm",
"muxed_units",
"ret_addr_stack",
"v7a",
"vfp4",
"vldn_align",
"vmlx_forwarding",
},
.kryo = .{
"v8a",
},
.mpcore = .{
"slowfpvmlx",
"v6k",
"vfp2",
},
.mpcorenovfp = .{
"v6k",
},
.neoverse_n1 = .{
"dotprod",
"v8_2a",
},
.neoverse_n2 = .{
"bf16",
"fp16fml",
"i8mm",
"v9a",
},
.neoverse_v1 = .{
"bf16",
"fullfp16",
"i8mm",
"v8_4a",
},
.sc000 = .{
"no_branch_predictor",
"v6m",
},
.sc300 = .{
"no_branch_predictor",
"use_misched",
"v7m",
},
.strongarm = .{
"v4",
},
.strongarm110 = .{
"v4",
},
.strongarm1100 = .{
"v4",
},
.strongarm1110 = .{
"v4",
},
.swift = .{
"avoid_movs_shop",
"avoid_partial_cpsr",
"disable_postra_scheduler",
"hwdiv",
"hwdiv_arm",
"mp",
"neonfp",
"prefer_ishst",
"prof_unpr",
"ret_addr_stack",
"slow_load_D_subreg",
"slow_odd_reg",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"use_misched",
"v7a",
"vfp4",
"vmlx_hazards",
"wide_stride_vfp",
},
.xscale = .{
"v5te",
},
},
.aarch64 = .{
.a64fx = .{
"aes",
"aggressive_fma",
"arith_bcc_fusion",
"complxnum",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"sve",
"use_postra_scheduler",
"v8_2a",
},
.ampere1 = .{
"aes",
"aggressive_fma",
"alu_lsl_fast",
"arith_bcc_fusion",
"cmp_bcc_fusion",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"ldp_aligned_only",
"perfmon",
"rand",
"sha3",
"store_pair_suppress",
"stp_aligned_only",
"use_postra_scheduler",
"v8_6a",
},
.ampere1a = .{
"aes",
"aggressive_fma",
"alu_lsl_fast",
"arith_bcc_fusion",
"cmp_bcc_fusion",
"fullfp16",
"fuse_address",
"fuse_addsub_2reg_const1",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"ldp_aligned_only",
"mte",
"perfmon",
"rand",
"sha3",
"sm4",
"store_pair_suppress",
"stp_aligned_only",
"use_postra_scheduler",
"v8_6a",
},
.ampere1b = .{
"aes",
"aggressive_fma",
"alu_lsl_fast",
"arith_bcc_fusion",
"cmp_bcc_fusion",
"cssc",
"enable_select_opt",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"ldp_aligned_only",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"sha3",
"sm4",
"store_pair_suppress",
"stp_aligned_only",
"use_postra_scheduler",
"v8_7a",
},
.apple_a10 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"crc",
"disable_latency_sched_heuristic",
"fuse_aes",
"fuse_crypto_eor",
"lor",
"pan",
"perfmon",
"rdm",
"sha2",
"store_pair_suppress",
"v8a",
"vh",
"zcm",
"zcz",
},
.apple_a11 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fullfp16",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8_2a",
"zcm",
"zcz",
},
.apple_a12 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fullfp16",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8_3a",
"zcm",
"zcz",
},
.apple_a13 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_4a",
"zcm",
"zcz",
},
.apple_a14 = .{
"aes",
"aggressive_fma",
"alternate_sextload_cvt_f32_pattern",
"altnzcv",
"arith_bcc_fusion",
"arith_cbz_fusion",
"ccdp",
"disable_latency_sched_heuristic",
"fp16fml",
"fptoint",
"fuse_address",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"perfmon",
"predres",
"sb",
"sha3",
"specrestrict",
"ssbs",
"store_pair_suppress",
"v8_4a",
"zcm",
"zcz",
},
.apple_a15 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_6a",
"zcm",
"zcz",
},
.apple_a16 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"hcx",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_6a",
"zcm",
"zcz",
},
.apple_a17 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"hcx",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_6a",
"zcm",
"zcz",
},
.apple_a7 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8a",
"zcm",
"zcz",
"zcz_fp_workaround",
},
.apple_a8 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8a",
"zcm",
"zcz",
"zcz_fp_workaround",
},
.apple_a9 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8a",
"zcm",
"zcz",
"zcz_fp_workaround",
},
.apple_m1 = .{
"aes",
"aggressive_fma",
"alternate_sextload_cvt_f32_pattern",
"altnzcv",
"arith_bcc_fusion",
"arith_cbz_fusion",
"ccdp",
"disable_latency_sched_heuristic",
"fp16fml",
"fptoint",
"fuse_address",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"perfmon",
"predres",
"sb",
"sha3",
"specrestrict",
"ssbs",
"store_pair_suppress",
"v8_4a",
"zcm",
"zcz",
},
.apple_m2 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_6a",
"zcm",
"zcz",
},
.apple_m3 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"hcx",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_6a",
"zcm",
"zcz",
},
.apple_m4 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"perfmon",
"sha3",
"sme2",
"sme_f64f64",
"sme_i16i64",
"v8_7a",
"zcm",
"zcz",
},
.apple_s4 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fullfp16",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8_3a",
"zcm",
"zcz",
},
.apple_s5 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fullfp16",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8_3a",
"zcm",
"zcz",
},
.carmel = .{
"aes",
"fullfp16",
"sha2",
"v8_2a",
},
.cobalt_100 = .{
"alu_lsl_fast",
"bf16",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_a34 = .{
"aes",
"crc",
"perfmon",
"sha2",
"v8a",
},
.cortex_a35 = .{
"aes",
"crc",
"perfmon",
"sha2",
"v8a",
},
.cortex_a510 = .{
"bf16",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_a520 = .{
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_a520ae = .{
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_a53 = .{
"aes",
"balance_fp_ops",
"crc",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"sha2",
"use_postra_scheduler",
"v8a",
},
.cortex_a55 = .{
"aes",
"dotprod",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"rcpc",
"sha2",
"use_postra_scheduler",
"v8_2a",
},
.cortex_a57 = .{
"addr_lsl_slow_14",
"aes",
"balance_fp_ops",
"crc",
"enable_select_opt",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"perfmon",
"predictable_select_expensive",
"sha2",
"use_postra_scheduler",
"v8a",
},
.cortex_a65 = .{
"aes",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"ssbs",
"v8_2a",
},
.cortex_a65ae = .{
"aes",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"ssbs",
"v8_2a",
},
.cortex_a710 = .{
"alu_lsl_fast",
"bf16",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_a715 = .{
"alu_lsl_fast",
"bf16",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_a72 = .{
"addr_lsl_slow_14",
"aes",
"crc",
"enable_select_opt",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"perfmon",
"predictable_select_expensive",
"sha2",
"v8a",
},
.cortex_a720 = .{
"alu_lsl_fast",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_a720ae = .{
"alu_lsl_fast",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_a725 = .{
"alu_lsl_fast",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_a73 = .{
"addr_lsl_slow_14",
"aes",
"crc",
"enable_select_opt",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"sha2",
"v8a",
},
.cortex_a75 = .{
"addr_lsl_slow_14",
"aes",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"v8_2a",
},
.cortex_a76 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"ssbs",
"v8_2a",
},
.cortex_a76ae = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"ssbs",
"v8_2a",
},
.cortex_a77 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"ssbs",
"v8_2a",
},
.cortex_a78 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.cortex_a78ae = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.cortex_a78c = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"flagm",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"pauth",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.cortex_r82 = .{
"ccdp",
"perfmon",
"predres",
"use_postra_scheduler",
"v8r",
},
.cortex_r82ae = .{
"ccdp",
"perfmon",
"predres",
"use_postra_scheduler",
"v8r",
},
.cortex_x1 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.cortex_x1c = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"flagm",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"lse2",
"pauth",
"perfmon",
"predictable_select_expensive",
"rcpc_immo",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.cortex_x2 = .{
"alu_lsl_fast",
"bf16",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_x3 = .{
"alu_lsl_fast",
"bf16",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_x4 = .{
"alu_lsl_fast",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_x925 = .{
"alu_lsl_fast",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cyclone = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8a",
"zcm",
"zcz",
"zcz_fp_workaround",
},
.emag = .{
"crc",
"crypto",
"perfmon",
"v8a",
},
.exynos_m1 = .{
"crc",
"crypto",
"exynos_cheap_as_move",
"force_32bit_jump_tables",
"fuse_aes",
"perfmon",
"slow_misaligned_128store",
"slow_paired_128",
"use_postra_scheduler",
"use_reciprocal_square_root",
"v8a",
},
.exynos_m2 = .{
"crc",
"crypto",
"exynos_cheap_as_move",
"force_32bit_jump_tables",
"fuse_aes",
"perfmon",
"slow_misaligned_128store",
"slow_paired_128",
"use_postra_scheduler",
"v8a",
},
.exynos_m3 = .{
"aes",
"alu_lsl_fast",
"crc",
"exynos_cheap_as_move",
"force_32bit_jump_tables",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_csel",
"fuse_literals",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
},
.exynos_m4 = .{
"aes",
"alu_lsl_fast",
"arith_bcc_fusion",
"arith_cbz_fusion",
"dotprod",
"exynos_cheap_as_move",
"force_32bit_jump_tables",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_csel",
"fuse_literals",
"perfmon",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8_2a",
"zcz",
},
.exynos_m5 = .{
"aes",
"alu_lsl_fast",
"arith_bcc_fusion",
"arith_cbz_fusion",
"dotprod",
"exynos_cheap_as_move",
"force_32bit_jump_tables",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_csel",
"fuse_literals",
"perfmon",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8_2a",
"zcz",
},
.falkor = .{
"aes",
"alu_lsl_fast",
"crc",
"perfmon",
"predictable_select_expensive",
"rdm",
"sha2",
"slow_strqro_store",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
"zcz",
},
.generic = .{
"enable_select_opt",
"ete",
"fuse_adrp_add",
"fuse_aes",
"neon",
"use_postra_scheduler",
},
.grace = .{
"alu_lsl_fast",
"bf16",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"spe",
"sve2_bitperm",
"use_fixed_over_scalable_if_equal_cost",
"use_postra_scheduler",
"v9a",
},
.kryo = .{
"aes",
"alu_lsl_fast",
"crc",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
"zcz",
},
.neoverse_512tvb = .{
"aes",
"alu_lsl_fast",
"bf16",
"ccdp",
"enable_select_opt",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"perfmon",
"predictable_select_expensive",
"rand",
"sha3",
"sm4",
"spe",
"ssbs",
"sve",
"use_postra_scheduler",
"v8_4a",
},
.neoverse_e1 = .{
"aes",
"dotprod",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"rcpc",
"sha2",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.neoverse_n1 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.neoverse_n2 = .{
"alu_lsl_fast",
"bf16",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.neoverse_n3 = .{
"alu_lsl_fast",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.neoverse_v1 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"bf16",
"ccdp",
"enable_select_opt",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"no_sve_fp_ld1r",
"perfmon",
"predictable_select_expensive",
"rand",
"sha3",
"sm4",
"spe",
"ssbs",
"sve",
"use_postra_scheduler",
"v8_4a",
},
.neoverse_v2 = .{
"alu_lsl_fast",
"bf16",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"spe",
"sve2_bitperm",
"use_fixed_over_scalable_if_equal_cost",
"use_postra_scheduler",
"v9a",
},
.neoverse_v3 = .{
"alu_lsl_fast",
"brbe",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"ls64",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.neoverse_v3ae = .{
"alu_lsl_fast",
"brbe",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"ls64",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.oryon_1 = .{
"aes",
"enable_select_opt",
"fp16fml",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"rand",
"sha3",
"sm4",
"spe",
"use_postra_scheduler",
"v8_6a",
},
.saphira = .{
"aes",
"alu_lsl_fast",
"perfmon",
"predictable_select_expensive",
"sha2",
"spe",
"store_pair_suppress",
"use_postra_scheduler",
"v8_4a",
"zcz",
},
.thunderx = .{
"aes",
"crc",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
},
.thunderx2t99 = .{
"aes",
"aggressive_fma",
"arith_bcc_fusion",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8_1a",
},
.thunderx3t110 = .{
"aes",
"aggressive_fma",
"arith_bcc_fusion",
"balance_fp_ops",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"strict_align",
"use_postra_scheduler",
"v8_3a",
},
.thunderxt81 = .{
"aes",
"crc",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
},
.thunderxt83 = .{
"aes",
"crc",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
},
.thunderxt88 = .{
"aes",
"crc",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
},
.tsv110 = .{
"aes",
"complxnum",
"dotprod",
"fp16fml",
"fuse_aes",
"jsconv",
"perfmon",
"sha2",
"spe",
"store_pair_suppress",
"use_postra_scheduler",
"v8_2a",
},
.xgene1 = .{
"perfmon",
"v8a",
},
},
.aarch64_be = .{
.a64fx = .{
"aes",
"aggressive_fma",
"arith_bcc_fusion",
"complxnum",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"sve",
"use_postra_scheduler",
"v8_2a",
},
.ampere1 = .{
"aes",
"aggressive_fma",
"alu_lsl_fast",
"arith_bcc_fusion",
"cmp_bcc_fusion",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"ldp_aligned_only",
"perfmon",
"rand",
"sha3",
"store_pair_suppress",
"stp_aligned_only",
"use_postra_scheduler",
"v8_6a",
},
.ampere1a = .{
"aes",
"aggressive_fma",
"alu_lsl_fast",
"arith_bcc_fusion",
"cmp_bcc_fusion",
"fullfp16",
"fuse_address",
"fuse_addsub_2reg_const1",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"ldp_aligned_only",
"mte",
"perfmon",
"rand",
"sha3",
"sm4",
"store_pair_suppress",
"stp_aligned_only",
"use_postra_scheduler",
"v8_6a",
},
.ampere1b = .{
"aes",
"aggressive_fma",
"alu_lsl_fast",
"arith_bcc_fusion",
"cmp_bcc_fusion",
"cssc",
"enable_select_opt",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"ldp_aligned_only",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"sha3",
"sm4",
"store_pair_suppress",
"stp_aligned_only",
"use_postra_scheduler",
"v8_7a",
},
.apple_a10 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"crc",
"disable_latency_sched_heuristic",
"fuse_aes",
"fuse_crypto_eor",
"lor",
"pan",
"perfmon",
"rdm",
"sha2",
"store_pair_suppress",
"v8a",
"vh",
"zcm",
"zcz",
},
.apple_a11 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fullfp16",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8_2a",
"zcm",
"zcz",
},
.apple_a12 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fullfp16",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8_3a",
"zcm",
"zcz",
},
.apple_a13 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_4a",
"zcm",
"zcz",
},
.apple_a14 = .{
"aes",
"aggressive_fma",
"alternate_sextload_cvt_f32_pattern",
"altnzcv",
"arith_bcc_fusion",
"arith_cbz_fusion",
"ccdp",
"disable_latency_sched_heuristic",
"fp16fml",
"fptoint",
"fuse_address",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"perfmon",
"predres",
"sb",
"sha3",
"specrestrict",
"ssbs",
"store_pair_suppress",
"v8_4a",
"zcm",
"zcz",
},
.apple_a15 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_6a",
"zcm",
"zcz",
},
.apple_a16 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"hcx",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_6a",
"zcm",
"zcz",
},
.apple_a17 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"hcx",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_6a",
"zcm",
"zcz",
},
.apple_a7 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8a",
"zcm",
"zcz",
"zcz_fp_workaround",
},
.apple_a8 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8a",
"zcm",
"zcz",
"zcz_fp_workaround",
},
.apple_a9 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8a",
"zcm",
"zcz",
"zcz_fp_workaround",
},
.apple_m1 = .{
"aes",
"aggressive_fma",
"alternate_sextload_cvt_f32_pattern",
"altnzcv",
"arith_bcc_fusion",
"arith_cbz_fusion",
"ccdp",
"disable_latency_sched_heuristic",
"fp16fml",
"fptoint",
"fuse_address",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"perfmon",
"predres",
"sb",
"sha3",
"specrestrict",
"ssbs",
"store_pair_suppress",
"v8_4a",
"zcm",
"zcz",
},
.apple_m2 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_6a",
"zcm",
"zcz",
},
.apple_m3 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"hcx",
"perfmon",
"sha3",
"store_pair_suppress",
"v8_6a",
"zcm",
"zcz",
},
.apple_m4 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fp16fml",
"fuse_address",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"perfmon",
"sha3",
"sme2",
"sme_f64f64",
"sme_i16i64",
"v8_7a",
"zcm",
"zcz",
},
.apple_s4 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fullfp16",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8_3a",
"zcm",
"zcz",
},
.apple_s5 = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fullfp16",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8_3a",
"zcm",
"zcz",
},
.carmel = .{
"aes",
"fullfp16",
"sha2",
"v8_2a",
},
.cobalt_100 = .{
"alu_lsl_fast",
"bf16",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_a34 = .{
"aes",
"crc",
"perfmon",
"sha2",
"v8a",
},
.cortex_a35 = .{
"aes",
"crc",
"perfmon",
"sha2",
"v8a",
},
.cortex_a510 = .{
"bf16",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_a520 = .{
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_a520ae = .{
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_a53 = .{
"aes",
"balance_fp_ops",
"crc",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"sha2",
"use_postra_scheduler",
"v8a",
},
.cortex_a55 = .{
"aes",
"dotprod",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"rcpc",
"sha2",
"use_postra_scheduler",
"v8_2a",
},
.cortex_a57 = .{
"addr_lsl_slow_14",
"aes",
"balance_fp_ops",
"crc",
"enable_select_opt",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"perfmon",
"predictable_select_expensive",
"sha2",
"use_postra_scheduler",
"v8a",
},
.cortex_a65 = .{
"aes",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"ssbs",
"v8_2a",
},
.cortex_a65ae = .{
"aes",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"ssbs",
"v8_2a",
},
.cortex_a710 = .{
"alu_lsl_fast",
"bf16",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_a715 = .{
"alu_lsl_fast",
"bf16",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_a72 = .{
"addr_lsl_slow_14",
"aes",
"crc",
"enable_select_opt",
"fuse_adrp_add",
"fuse_aes",
"fuse_literals",
"perfmon",
"predictable_select_expensive",
"sha2",
"v8a",
},
.cortex_a720 = .{
"alu_lsl_fast",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_a720ae = .{
"alu_lsl_fast",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_a725 = .{
"alu_lsl_fast",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_a73 = .{
"addr_lsl_slow_14",
"aes",
"crc",
"enable_select_opt",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"sha2",
"v8a",
},
.cortex_a75 = .{
"addr_lsl_slow_14",
"aes",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"v8_2a",
},
.cortex_a76 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"ssbs",
"v8_2a",
},
.cortex_a76ae = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"ssbs",
"v8_2a",
},
.cortex_a77 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"ssbs",
"v8_2a",
},
.cortex_a78 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.cortex_a78ae = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.cortex_a78c = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"flagm",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"pauth",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.cortex_r82 = .{
"ccdp",
"perfmon",
"predres",
"use_postra_scheduler",
"v8r",
},
.cortex_r82ae = .{
"ccdp",
"perfmon",
"predres",
"use_postra_scheduler",
"v8r",
},
.cortex_x1 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.cortex_x1c = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"cmp_bcc_fusion",
"dotprod",
"enable_select_opt",
"flagm",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"lse2",
"pauth",
"perfmon",
"predictable_select_expensive",
"rcpc_immo",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.cortex_x2 = .{
"alu_lsl_fast",
"bf16",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_x3 = .{
"alu_lsl_fast",
"bf16",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.cortex_x4 = .{
"alu_lsl_fast",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cortex_x925 = .{
"alu_lsl_fast",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.cyclone = .{
"aes",
"alternate_sextload_cvt_f32_pattern",
"arith_bcc_fusion",
"arith_cbz_fusion",
"disable_latency_sched_heuristic",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"sha2",
"store_pair_suppress",
"v8a",
"zcm",
"zcz",
"zcz_fp_workaround",
},
.emag = .{
"crc",
"crypto",
"perfmon",
"v8a",
},
.exynos_m1 = .{
"crc",
"crypto",
"exynos_cheap_as_move",
"force_32bit_jump_tables",
"fuse_aes",
"perfmon",
"slow_misaligned_128store",
"slow_paired_128",
"use_postra_scheduler",
"use_reciprocal_square_root",
"v8a",
},
.exynos_m2 = .{
"crc",
"crypto",
"exynos_cheap_as_move",
"force_32bit_jump_tables",
"fuse_aes",
"perfmon",
"slow_misaligned_128store",
"slow_paired_128",
"use_postra_scheduler",
"v8a",
},
.exynos_m3 = .{
"aes",
"alu_lsl_fast",
"crc",
"exynos_cheap_as_move",
"force_32bit_jump_tables",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_csel",
"fuse_literals",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
},
.exynos_m4 = .{
"aes",
"alu_lsl_fast",
"arith_bcc_fusion",
"arith_cbz_fusion",
"dotprod",
"exynos_cheap_as_move",
"force_32bit_jump_tables",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_csel",
"fuse_literals",
"perfmon",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8_2a",
"zcz",
},
.exynos_m5 = .{
"aes",
"alu_lsl_fast",
"arith_bcc_fusion",
"arith_cbz_fusion",
"dotprod",
"exynos_cheap_as_move",
"force_32bit_jump_tables",
"fullfp16",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_csel",
"fuse_literals",
"perfmon",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8_2a",
"zcz",
},
.falkor = .{
"aes",
"alu_lsl_fast",
"crc",
"perfmon",
"predictable_select_expensive",
"rdm",
"sha2",
"slow_strqro_store",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
"zcz",
},
.generic = .{
"enable_select_opt",
"ete",
"fuse_adrp_add",
"fuse_aes",
"neon",
"use_postra_scheduler",
},
.grace = .{
"alu_lsl_fast",
"bf16",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"spe",
"sve2_bitperm",
"use_fixed_over_scalable_if_equal_cost",
"use_postra_scheduler",
"v9a",
},
.kryo = .{
"aes",
"alu_lsl_fast",
"crc",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
"zcz",
},
.neoverse_512tvb = .{
"aes",
"alu_lsl_fast",
"bf16",
"ccdp",
"enable_select_opt",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"perfmon",
"predictable_select_expensive",
"rand",
"sha3",
"sm4",
"spe",
"ssbs",
"sve",
"use_postra_scheduler",
"v8_4a",
},
.neoverse_e1 = .{
"aes",
"dotprod",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"rcpc",
"sha2",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.neoverse_n1 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"dotprod",
"enable_select_opt",
"fullfp16",
"fuse_adrp_add",
"fuse_aes",
"perfmon",
"predictable_select_expensive",
"rcpc",
"sha2",
"spe",
"ssbs",
"use_postra_scheduler",
"v8_2a",
},
.neoverse_n2 = .{
"alu_lsl_fast",
"bf16",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"sve2_bitperm",
"use_postra_scheduler",
"v9a",
},
.neoverse_n3 = .{
"alu_lsl_fast",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.neoverse_v1 = .{
"addr_lsl_slow_14",
"aes",
"alu_lsl_fast",
"bf16",
"ccdp",
"enable_select_opt",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"no_sve_fp_ld1r",
"perfmon",
"predictable_select_expensive",
"rand",
"sha3",
"sm4",
"spe",
"ssbs",
"sve",
"use_postra_scheduler",
"v8_4a",
},
.neoverse_v2 = .{
"alu_lsl_fast",
"bf16",
"cmp_bcc_fusion",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"i8mm",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"spe",
"sve2_bitperm",
"use_fixed_over_scalable_if_equal_cost",
"use_postra_scheduler",
"v9a",
},
.neoverse_v3 = .{
"alu_lsl_fast",
"brbe",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"ls64",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.neoverse_v3ae = .{
"alu_lsl_fast",
"brbe",
"enable_select_opt",
"ete",
"fp16fml",
"fuse_adrp_add",
"fuse_aes",
"ls64",
"mte",
"perfmon",
"predictable_select_expensive",
"rand",
"spe",
"spe_eef",
"sve2_bitperm",
"use_postra_scheduler",
"v9_2a",
},
.oryon_1 = .{
"aes",
"enable_select_opt",
"fp16fml",
"fuse_address",
"fuse_adrp_add",
"fuse_aes",
"fuse_crypto_eor",
"perfmon",
"rand",
"sha3",
"sm4",
"spe",
"use_postra_scheduler",
"v8_6a",
},
.saphira = .{
"aes",
"alu_lsl_fast",
"perfmon",
"predictable_select_expensive",
"sha2",
"spe",
"store_pair_suppress",
"use_postra_scheduler",
"v8_4a",
"zcz",
},
.thunderx = .{
"aes",
"crc",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
},
.thunderx2t99 = .{
"aes",
"aggressive_fma",
"arith_bcc_fusion",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8_1a",
},
.thunderx3t110 = .{
"aes",
"aggressive_fma",
"arith_bcc_fusion",
"balance_fp_ops",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"strict_align",
"use_postra_scheduler",
"v8_3a",
},
.thunderxt81 = .{
"aes",
"crc",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
},
.thunderxt83 = .{
"aes",
"crc",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
},
.thunderxt88 = .{
"aes",
"crc",
"perfmon",
"predictable_select_expensive",
"sha2",
"store_pair_suppress",
"use_postra_scheduler",
"v8a",
},
.tsv110 = .{
"aes",
"complxnum",
"dotprod",
"fp16fml",
"fuse_aes",
"jsconv",
"perfmon",
"sha2",
"spe",
"store_pair_suppress",
"use_postra_scheduler",
"v8_2a",
},
.xgene1 = .{
"perfmon",
"v8a",
},
},
.avr = .{
.at43usb320 = .{
"avr31",
},
.at43usb355 = .{
"avr3",
},
.at76c711 = .{
"avr3",
},
.at86rf401 = .{
"avr2",
"lpmx",
"movw",
},
.at90c8534 = .{
"avr2",
},
.at90can128 = .{
"avr51",
},
.at90can32 = .{
"avr5",
},
.at90can64 = .{
"avr5",
},
.at90pwm1 = .{
"avr4",
},
.at90pwm161 = .{
"avr5",
},
.at90pwm2 = .{
"avr4",
},
.at90pwm216 = .{
"avr5",
},
.at90pwm2b = .{
"avr4",
},
.at90pwm3 = .{
"avr4",
},
.at90pwm316 = .{
"avr5",
},
.at90pwm3b = .{
"avr4",
},
.at90pwm81 = .{
"avr4",
},
.at90s1200 = .{
"avr0",
"smallstack",
},
.at90s2313 = .{
"avr2",
"smallstack",
},
.at90s2323 = .{
"avr2",
"smallstack",
},
.at90s2333 = .{
"avr2",
"smallstack",
},
.at90s2343 = .{
"avr2",
"smallstack",
},
.at90s4414 = .{
"avr2",
"smallstack",
},
.at90s4433 = .{
"avr2",
"smallstack",
},
.at90s4434 = .{
"avr2",
"smallstack",
},
.at90s8515 = .{
"avr2",
},
.at90s8535 = .{
"avr2",
},
.at90scr100 = .{
"avr5",
},
.at90usb1286 = .{
"avr51",
},
.at90usb1287 = .{
"avr51",
},
.at90usb162 = .{
"avr35",
},
.at90usb646 = .{
"avr5",
},
.at90usb647 = .{
"avr5",
},
.at90usb82 = .{
"avr35",
},
.at94k = .{
"avr3",
"lpmx",
"movw",
"mul",
},
.ata5272 = .{
"avr25",
},
.ata5505 = .{
"avr35",
},
.ata5702m322 = .{
"avr5",
},
.ata5782 = .{
"avr5",
},
.ata5790 = .{
"avr5",
},
.ata5790n = .{
"avr5",
},
.ata5791 = .{
"avr5",
},
.ata5795 = .{
"avr5",
},
.ata5831 = .{
"avr5",
},
.ata6285 = .{
"avr4",
},
.ata6286 = .{
"avr4",
},
.ata6289 = .{
"avr4",
},
.ata6612c = .{
"avr4",
},
.ata6613c = .{
"avr5",
},
.ata6614q = .{
"avr5",
},
.ata6616c = .{
"avr25",
},
.ata6617c = .{
"avr35",
},
.ata664251 = .{
"avr35",
},
.ata8210 = .{
"avr5",
},
.ata8510 = .{
"avr5",
},
.atmega103 = .{
"avr31",
},
.atmega128 = .{
"avr51",
},
.atmega1280 = .{
"avr51",
},
.atmega1281 = .{
"avr51",
},
.atmega1284 = .{
"avr51",
},
.atmega1284p = .{
"avr51",
},
.atmega1284rfr2 = .{
"avr51",
},
.atmega128a = .{
"avr51",
},
.atmega128rfa1 = .{
"avr51",
},
.atmega128rfr2 = .{
"avr51",
},
.atmega16 = .{
"avr5",
},
.atmega1608 = .{
"xmega3",
},
.atmega1609 = .{
"xmega3",
},
.atmega161 = .{
"avr3",
"lpmx",
"movw",
"mul",
"spm",
},
.atmega162 = .{
"avr5",
},
.atmega163 = .{
"avr3",
"lpmx",
"movw",
"mul",
"spm",
},
.atmega164a = .{
"avr5",
},
.atmega164p = .{
"avr5",
},
.atmega164pa = .{
"avr5",
},
.atmega165 = .{
"avr5",
},
.atmega165a = .{
"avr5",
},
.atmega165p = .{
"avr5",
},
.atmega165pa = .{
"avr5",
},
.atmega168 = .{
"avr5",
},
.atmega168a = .{
"avr5",
},
.atmega168p = .{
"avr5",
},
.atmega168pa = .{
"avr5",
},
.atmega168pb = .{
"avr5",
},
.atmega169 = .{
"avr5",
},
.atmega169a = .{
"avr5",
},
.atmega169p = .{
"avr5",
},
.atmega169pa = .{
"avr5",
},
.atmega16a = .{
"avr5",
},
.atmega16hva = .{
"avr5",
},
.atmega16hva2 = .{
"avr5",
},
.atmega16hvb = .{
"avr5",
},
.atmega16hvbrevb = .{
"avr5",
},
.atmega16m1 = .{
"avr5",
},
.atmega16u2 = .{
"avr35",
},
.atmega16u4 = .{
"avr5",
},
.atmega2560 = .{
"avr6",
},
.atmega2561 = .{
"avr6",
},
.atmega2564rfr2 = .{
"avr6",
},
.atmega256rfr2 = .{
"avr6",
},
.atmega32 = .{
"avr5",
},
.atmega3208 = .{
"xmega3",
},
.atmega3209 = .{
"xmega3",
},
.atmega323 = .{
"avr5",
},
.atmega324a = .{
"avr5",
},
.atmega324p = .{
"avr5",
},
.atmega324pa = .{
"avr5",
},
.atmega324pb = .{
"avr5",
},
.atmega325 = .{
"avr5",
},
.atmega3250 = .{
"avr5",
},
.atmega3250a = .{
"avr5",
},
.atmega3250p = .{
"avr5",
},
.atmega3250pa = .{
"avr5",
},
.atmega325a = .{
"avr5",
},
.atmega325p = .{
"avr5",
},
.atmega325pa = .{
"avr5",
},
.atmega328 = .{
"avr5",
},
.atmega328p = .{
"avr5",
},
.atmega328pb = .{
"avr5",
},
.atmega329 = .{
"avr5",
},
.atmega3290 = .{
"avr5",
},
.atmega3290a = .{
"avr5",
},
.atmega3290p = .{
"avr5",
},
.atmega3290pa = .{
"avr5",
},
.atmega329a = .{
"avr5",
},
.atmega329p = .{
"avr5",
},
.atmega329pa = .{
"avr5",
},
.atmega32a = .{
"avr5",
},
.atmega32c1 = .{
"avr5",
},
.atmega32hvb = .{
"avr5",
},
.atmega32hvbrevb = .{
"avr5",
},
.atmega32m1 = .{
"avr5",
},
.atmega32u2 = .{
"avr35",
},
.atmega32u4 = .{
"avr5",
},
.atmega32u6 = .{
"avr5",
},
.atmega406 = .{
"avr5",
},
.atmega48 = .{
"avr4",
},
.atmega4808 = .{
"xmega3",
},
.atmega4809 = .{
"xmega3",
},
.atmega48a = .{
"avr4",
},
.atmega48p = .{
"avr4",
},
.atmega48pa = .{
"avr4",
},
.atmega48pb = .{
"avr4",
},
.atmega64 = .{
"avr5",
},
.atmega640 = .{
"avr5",
},
.atmega644 = .{
"avr5",
},
.atmega644a = .{
"avr5",
},
.atmega644p = .{
"avr5",
},
.atmega644pa = .{
"avr5",
},
.atmega644rfr2 = .{
"avr5",
},
.atmega645 = .{
"avr5",
},
.atmega6450 = .{
"avr5",
},
.atmega6450a = .{
"avr5",
},
.atmega6450p = .{
"avr5",
},
.atmega645a = .{
"avr5",
},
.atmega645p = .{
"avr5",
},
.atmega649 = .{
"avr5",
},
.atmega6490 = .{
"avr5",
},
.atmega6490a = .{
"avr5",
},
.atmega6490p = .{
"avr5",
},
.atmega649a = .{
"avr5",
},
.atmega649p = .{
"avr5",
},
.atmega64a = .{
"avr5",
},
.atmega64c1 = .{
"avr5",
},
.atmega64hve = .{
"avr5",
},
.atmega64hve2 = .{
"avr5",
},
.atmega64m1 = .{
"avr5",
},
.atmega64rfr2 = .{
"avr5",
},
.atmega8 = .{
"avr2",
"lpmx",
"movw",
"mul",
"spm",
},
.atmega808 = .{
"xmega3",
},
.atmega809 = .{
"xmega3",
},
.atmega8515 = .{
"avr2",
"lpmx",
"movw",
"mul",
"spm",
},
.atmega8535 = .{
"avr2",
"lpmx",
"movw",
"mul",
"spm",
},
.atmega88 = .{
"avr4",
},
.atmega88a = .{
"avr4",
},
.atmega88p = .{
"avr4",
},
.atmega88pa = .{
"avr4",
},
.atmega88pb = .{
"avr4",
},
.atmega8a = .{
"avr2",
"lpmx",
"movw",
"mul",
"spm",
},
.atmega8hva = .{
"avr4",
},
.atmega8u2 = .{
"avr35",
},
.attiny10 = .{
"avrtiny",
},
.attiny102 = .{
"avrtiny",
},
.attiny104 = .{
"avrtiny",
},
.attiny11 = .{
"avr1",
"smallstack",
},
.attiny12 = .{
"avr1",
"smallstack",
},
.attiny13 = .{
"avr25",
"smallstack",
},
.attiny13a = .{
"avr25",
"smallstack",
},
.attiny15 = .{
"avr1",
"smallstack",
},
.attiny1604 = .{
"xmega3",
},
.attiny1606 = .{
"xmega3",
},
.attiny1607 = .{
"xmega3",
},
.attiny1614 = .{
"xmega3",
},
.attiny1616 = .{
"xmega3",
},
.attiny1617 = .{
"xmega3",
},
.attiny1624 = .{
"xmega3",
},
.attiny1626 = .{
"xmega3",
},
.attiny1627 = .{
"xmega3",
},
.attiny1634 = .{
"avr35",
},
.attiny167 = .{
"avr35",
},
.attiny20 = .{
"avrtiny",
},
.attiny202 = .{
"xmega3",
},
.attiny204 = .{
"xmega3",
},
.attiny212 = .{
"xmega3",
},
.attiny214 = .{
"xmega3",
},
.attiny22 = .{
"avr2",
"smallstack",
},
.attiny2313 = .{
"avr25",
"smallstack",
},
.attiny2313a = .{
"avr25",
"smallstack",
},
.attiny24 = .{
"avr25",
"smallstack",
},
.attiny24a = .{
"avr25",
"smallstack",
},
.attiny25 = .{
"avr25",
"smallstack",
},
.attiny26 = .{
"avr2",
"lpmx",
"smallstack",
},
.attiny261 = .{
"avr25",
"smallstack",
},
.attiny261a = .{
"avr25",
"smallstack",
},
.attiny28 = .{
"avr1",
"smallstack",
},
.attiny3216 = .{
"xmega3",
},
.attiny3217 = .{
"xmega3",
},
.attiny4 = .{
"avrtiny",
},
.attiny40 = .{
"avrtiny",
},
.attiny402 = .{
"xmega3",
},
.attiny404 = .{
"xmega3",
},
.attiny406 = .{
"xmega3",
},
.attiny412 = .{
"xmega3",
},
.attiny414 = .{
"xmega3",
},
.attiny416 = .{
"xmega3",
},
.attiny417 = .{
"xmega3",
},
.attiny4313 = .{
"avr25",
},
.attiny43u = .{
"avr25",
},
.attiny44 = .{
"avr25",
},
.attiny441 = .{
"avr25",
},
.attiny44a = .{
"avr25",
},
.attiny45 = .{
"avr25",
},
.attiny461 = .{
"avr25",
},
.attiny461a = .{
"avr25",
},
.attiny48 = .{
"avr25",
},
.attiny5 = .{
"avrtiny",
},
.attiny804 = .{
"xmega3",
},
.attiny806 = .{
"xmega3",
},
.attiny807 = .{
"xmega3",
},
.attiny814 = .{
"xmega3",
},
.attiny816 = .{
"xmega3",
},
.attiny817 = .{
"xmega3",
},
.attiny828 = .{
"avr25",
},
.attiny84 = .{
"avr25",
},
.attiny841 = .{
"avr25",
},
.attiny84a = .{
"avr25",
},
.attiny85 = .{
"avr25",
},
.attiny861 = .{
"avr25",
},
.attiny861a = .{
"avr25",
},
.attiny87 = .{
"avr25",
},
.attiny88 = .{
"avr25",
},
.attiny9 = .{
"avrtiny",
},
.atxmega128a1 = .{
"xmega",
},
.atxmega128a1u = .{
"xmegau",
},
.atxmega128a3 = .{
"xmega",
},
.atxmega128a3u = .{
"xmegau",
},
.atxmega128a4u = .{
"xmegau",
},
.atxmega128b1 = .{
"xmegau",
},
.atxmega128b3 = .{
"xmegau",
},
.atxmega128c3 = .{
"xmegau",
},
.atxmega128d3 = .{
"xmega",
},
.atxmega128d4 = .{
"xmega",
},
.atxmega16a4 = .{
"xmega",
},
.atxmega16a4u = .{
"xmegau",
},
.atxmega16c4 = .{
"xmegau",
},
.atxmega16d4 = .{
"xmega",
},
.atxmega16e5 = .{
"xmegau",
},
.atxmega192a3 = .{
"xmega",
},
.atxmega192a3u = .{
"xmegau",
},
.atxmega192c3 = .{
"xmegau",
},
.atxmega192d3 = .{
"xmega",
},
.atxmega256a3 = .{
"xmega",
},
.atxmega256a3b = .{
"xmega",
},
.atxmega256a3bu = .{
"xmegau",
},
.atxmega256a3u = .{
"xmegau",
},
.atxmega256c3 = .{
"xmegau",
},
.atxmega256d3 = .{
"xmega",
},
.atxmega32a4 = .{
"xmega",
},
.atxmega32a4u = .{
"xmegau",
},
.atxmega32c3 = .{
"xmegau",
},
.atxmega32c4 = .{
"xmegau",
},
.atxmega32d3 = .{
"xmega",
},
.atxmega32d4 = .{
"xmega",
},
.atxmega32e5 = .{
"xmegau",
},
.atxmega384c3 = .{
"xmegau",
},
.atxmega384d3 = .{
"xmega",
},
.atxmega64a1 = .{
"xmega",
},
.atxmega64a1u = .{
"xmegau",
},
.atxmega64a3 = .{
"xmega",
},
.atxmega64a3u = .{
"xmegau",
},
.atxmega64a4u = .{
"xmegau",
},
.atxmega64b1 = .{
"xmegau",
},
.atxmega64b3 = .{
"xmegau",
},
.atxmega64c3 = .{
"xmegau",
},
.atxmega64d3 = .{
"xmega",
},
.atxmega64d4 = .{
"xmega",
},
.atxmega8e5 = .{
"xmegau",
},
.avr1 = .{
"avr1",
},
.avr2 = .{
"avr2",
},
.avr25 = .{
"avr25",
},
.avr3 = .{
"avr3",
},
.avr31 = .{
"avr31",
},
.avr35 = .{
"avr35",
},
.avr4 = .{
"avr4",
},
.avr5 = .{
"avr5",
},
.avr51 = .{
"avr51",
},
.avr6 = .{
"avr6",
},
.avrtiny = .{
"avrtiny",
},
.avrxmega1 = .{
"xmega",
},
.avrxmega2 = .{
"xmega",
},
.avrxmega3 = .{
"xmega3",
},
.avrxmega4 = .{
"xmega",
},
.avrxmega5 = .{
"xmega",
},
.avrxmega6 = .{
"xmega",
},
.avrxmega7 = .{
"xmega",
},
.m3000 = .{
"avr5",
},
},
.bpfel = .{
.generic = .{},
.probe = .{},
.v1 = .{},
.v2 = .{},
.v3 = .{
"alu32",
},
.v4 = .{
"alu32",
},
},
.bpfeb = .{
.generic = .{},
.probe = .{},
.v1 = .{},
.v2 = .{},
.v3 = .{
"alu32",
},
.v4 = .{
"alu32",
},
},
.csky = .{
.c807 = .{
"cache",
"ck807",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.c807f = .{
"cache",
"ck807",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"float1e3",
"float3e4",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.c810 = .{
"7e10",
"cache",
"ck810",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.c810t = .{
"7e10",
"cache",
"ck810",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.c810tv = .{
"7e10",
"cache",
"ck810",
"ck810v",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdspv1",
},
.c810v = .{
"7e10",
"cache",
"ck810",
"ck810v",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdspv1",
},
.c860 = .{
"10e60",
"3e3r2",
"3e3r3",
"btst16",
"cache",
"ck860",
"dspe60",
"float7e60",
"fpuv3_df",
"fpuv3_hf",
"fpuv3_hi",
"fpuv3_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.c860v = .{
"10e60",
"3e3r2",
"3e3r3",
"btst16",
"cache",
"ck860",
"ck860v",
"dspe60",
"float7e60",
"fpuv3_df",
"fpuv3_hf",
"fpuv3_hi",
"fpuv3_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdsp2e60f",
"vdspv2",
},
.ck801 = .{
"btst16",
"ck801",
"e1",
"trust",
},
.ck801t = .{
"btst16",
"ck801",
"e1",
"trust",
},
.ck802 = .{
"btst16",
"ck802",
"e2",
"nvic",
"trust",
},
.ck802j = .{
"btst16",
"ck802",
"e2",
"java",
"nvic",
"trust",
},
.ck802t = .{
"btst16",
"ck802",
"e2",
"nvic",
"trust",
},
.ck803 = .{
"btst16",
"ck803",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803e = .{
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"edsp",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ef = .{
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efh = .{
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efhr1 = .{
"3e3r1",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efhr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efhr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efht = .{
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efhtr1 = .{
"3e3r1",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efhtr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efhtr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efr1 = .{
"3e3r1",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803efr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803eft = .{
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803eftr1 = .{
"3e3r1",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803eftr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803eftr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803eh = .{
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"edsp",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ehr1 = .{
"3e3r1",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ehr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ehr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803eht = .{
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"edsp",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ehtr1 = .{
"3e3r1",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ehtr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ehtr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803er1 = .{
"3e3r1",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803er2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803er3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803et = .{
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"edsp",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803etr1 = .{
"3e3r1",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803etr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803etr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dsp1e2",
"dspe60",
"dspv2",
"edsp",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803f = .{
"btst16",
"ck803",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803fh = .{
"btst16",
"ck803",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803fhr1 = .{
"3e3r1",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803fhr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803fhr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803fr1 = .{
"3e3r1",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803fr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803fr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ft = .{
"btst16",
"ck803",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ftr1 = .{
"3e3r1",
"btst16",
"ck803",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ftr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ftr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803h = .{
"btst16",
"ck803",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803hr1 = .{
"3e3r1",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803hr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803hr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803ht = .{
"btst16",
"ck803",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803htr1 = .{
"3e3r1",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803htr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803htr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803r1 = .{
"3e3r1",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803r2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803r3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803s = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803se = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"dsp1e2",
"dspe60",
"edsp",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803sef = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"dsp1e2",
"dspe60",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803sefn = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"dsp1e2",
"dsp_silan",
"dspe60",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803sefnt = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"dsp1e2",
"dsp_silan",
"dspe60",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803seft = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"dsp1e2",
"dspe60",
"edsp",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803sen = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"dsp1e2",
"dsp_silan",
"dspe60",
"edsp",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803sf = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803sfn = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"dsp_silan",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803sn = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"dsp_silan",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803snt = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"dsp_silan",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803st = .{
"3e3r1",
"btst16",
"ck803",
"ck803s",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803t = .{
"btst16",
"ck803",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803tr1 = .{
"3e3r1",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803tr2 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck803tr3 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"dspv2",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804e = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804ef = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804efh = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804efht = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804eft = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804eh = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804eht = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804et = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804f = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804fh = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804ft = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804h = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804ht = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck804t = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"hwdiv",
"mp",
"nvic",
"trust",
},
.ck805 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck805",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
"vdsp2e3",
"vdspv2",
},
.ck805e = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck805",
"dspv2",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
"vdsp2e3",
"vdspv2",
},
.ck805ef = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck805",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
"vdsp2e3",
"vdspv2",
},
.ck805eft = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck805",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
"vdsp2e3",
"vdspv2",
},
.ck805et = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck805",
"dspv2",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
"vdsp2e3",
"vdspv2",
},
.ck805f = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck805",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
"vdsp2e3",
"vdspv2",
},
.ck805ft = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck805",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
"vdsp2e3",
"vdspv2",
},
.ck805t = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck805",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
"vdsp2e3",
"vdspv2",
},
.ck807 = .{
"cache",
"ck807",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck807e = .{
"cache",
"ck807",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck807ef = .{
"cache",
"ck807",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"float1e3",
"float3e4",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck807f = .{
"cache",
"ck807",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"float1e3",
"float3e4",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck810 = .{
"7e10",
"cache",
"ck810",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck810e = .{
"7e10",
"cache",
"ck810",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck810ef = .{
"7e10",
"cache",
"ck810",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck810eft = .{
"7e10",
"cache",
"ck810",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck810eftv = .{
"7e10",
"cache",
"ck810",
"ck810v",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdspv1",
},
.ck810efv = .{
"7e10",
"cache",
"ck810",
"ck810v",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdspv1",
},
.ck810et = .{
"7e10",
"cache",
"ck810",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck810etv = .{
"7e10",
"cache",
"ck810",
"ck810v",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdspv1",
},
.ck810ev = .{
"7e10",
"cache",
"ck810",
"ck810v",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdspv1",
},
.ck810f = .{
"7e10",
"cache",
"ck810",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck810ft = .{
"7e10",
"cache",
"ck810",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck810ftv = .{
"7e10",
"cache",
"ck810",
"ck810v",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdspv1",
},
.ck810fv = .{
"7e10",
"cache",
"ck810",
"ck810v",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdspv1",
},
.ck810t = .{
"7e10",
"cache",
"ck810",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck810tv = .{
"7e10",
"cache",
"ck810",
"ck810v",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdspv1",
},
.ck810v = .{
"7e10",
"cache",
"ck810",
"ck810v",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdspv1",
},
.ck860 = .{
"10e60",
"3e3r2",
"3e3r3",
"btst16",
"cache",
"ck860",
"dspe60",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck860f = .{
"10e60",
"3e3r2",
"3e3r3",
"btst16",
"cache",
"ck860",
"dspe60",
"float7e60",
"fpuv3_df",
"fpuv3_hf",
"fpuv3_hi",
"fpuv3_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.ck860fv = .{
"10e60",
"3e3r2",
"3e3r3",
"btst16",
"cache",
"ck860",
"ck860v",
"dspe60",
"float7e60",
"fpuv3_df",
"fpuv3_hf",
"fpuv3_hi",
"fpuv3_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdsp2e60f",
"vdspv2",
},
.ck860v = .{
"10e60",
"3e3r2",
"3e3r3",
"btst16",
"cache",
"ck860",
"ck860v",
"dspe60",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
"vdsp2e60f",
"vdspv2",
},
.e801 = .{
"btst16",
"ck801",
"e1",
"trust",
},
.e802 = .{
"btst16",
"ck802",
"e2",
"nvic",
"trust",
},
.e802t = .{
"btst16",
"ck802",
"e2",
"nvic",
"trust",
},
.e803 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"hwdiv",
"mp",
"nvic",
"trust",
},
.e803t = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"hwdiv",
"mp",
"nvic",
"trust",
},
.e804d = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.e804df = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.e804dft = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.e804dt = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"dspv2",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
},
.e804f = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.e804ft = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck804",
"float1e3",
"floate1",
"fpuv2_sf",
"hwdiv",
"mp",
"nvic",
"trust",
},
.generic = .{
"btst16",
},
.i805 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck805",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
"vdsp2e3",
"vdspv2",
},
.i805f = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"ck805",
"float1e3",
"floate1",
"fpuv2_sf",
"high_registers",
"hwdiv",
"mp",
"nvic",
"trust",
"vdsp2e3",
"vdspv2",
},
.r807 = .{
"cache",
"ck807",
"dsp1e2",
"dspe60",
"edsp",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.r807f = .{
"cache",
"ck807",
"dsp1e2",
"dspe60",
"edsp",
"fdivdu",
"float1e2",
"float1e3",
"float3e4",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"hard_tp",
"high_registers",
"hwdiv",
"mp",
"mp1e2",
"nvic",
"trust",
},
.s802 = .{
"btst16",
"ck802",
"e2",
"nvic",
"trust",
},
.s802t = .{
"btst16",
"ck802",
"e2",
"nvic",
"trust",
},
.s803 = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"hwdiv",
"mp",
"nvic",
"trust",
},
.s803t = .{
"3e3r2",
"3e3r3",
"btst16",
"ck803",
"hwdiv",
"mp",
"nvic",
"trust",
},
},
.hexagon = .{
.generic = .{
"cabac",
"compound",
"duplex",
"memops",
"nvj",
"nvs",
"prev65",
"small_data",
"v5",
"v55",
"v60",
},
.hexagonv5 = .{
"cabac",
"compound",
"duplex",
"memops",
"nvj",
"nvs",
"prev65",
"small_data",
"v5",
},
.hexagonv55 = .{
"cabac",
"compound",
"duplex",
"memops",
"nvj",
"nvs",
"prev65",
"small_data",
"v5",
"v55",
},
.hexagonv60 = .{
"cabac",
"compound",
"duplex",
"memops",
"nvj",
"nvs",
"prev65",
"small_data",
"v5",
"v55",
"v60",
},
.hexagonv62 = .{
"cabac",
"compound",
"duplex",
"memops",
"nvj",
"nvs",
"prev65",
"small_data",
"v5",
"v55",
"v60",
"v62",
},
.hexagonv65 = .{
"cabac",
"compound",
"duplex",
"mem_noshuf",
"memops",
"nvj",
"nvs",
"small_data",
"v5",
"v55",
"v60",
"v62",
"v65",
},
.hexagonv66 = .{
"cabac",
"compound",
"duplex",
"mem_noshuf",
"memops",
"nvj",
"nvs",
"small_data",
"v5",
"v55",
"v60",
"v62",
"v65",
"v66",
},
.hexagonv67 = .{
"cabac",
"compound",
"duplex",
"mem_noshuf",
"memops",
"nvj",
"nvs",
"small_data",
"v5",
"v55",
"v60",
"v62",
"v65",
"v66",
"v67",
},
.hexagonv67t = .{
"audio",
"compound",
"mem_noshuf",
"memops",
"nvs",
"small_data",
"tinycore",
"v5",
"v55",
"v60",
"v62",
"v65",
"v66",
"v67",
},
.hexagonv68 = .{
"cabac",
"compound",
"duplex",
"mem_noshuf",
"memops",
"nvj",
"nvs",
"small_data",
"v5",
"v55",
"v60",
"v62",
"v65",
"v66",
"v67",
"v68",
},
.hexagonv69 = .{
"cabac",
"compound",
"duplex",
"mem_noshuf",
"memops",
"nvj",
"nvs",
"small_data",
"v5",
"v55",
"v60",
"v62",
"v65",
"v66",
"v67",
"v68",
"v69",
},
.hexagonv71 = .{
"cabac",
"compound",
"duplex",
"mem_noshuf",
"memops",
"nvj",
"nvs",
"small_data",
"v5",
"v55",
"v60",
"v62",
"v65",
"v66",
"v67",
"v68",
"v69",
"v71",
},
.hexagonv71t = .{
"audio",
"compound",
"mem_noshuf",
"memops",
"nvs",
"small_data",
"tinycore",
"v5",
"v55",
"v60",
"v62",
"v65",
"v66",
"v67",
"v68",
"v69",
"v71",
},
.hexagonv73 = .{
"compound",
"duplex",
"mem_noshuf",
"memops",
"nvj",
"nvs",
"small_data",
"v5",
"v55",
"v60",
"v62",
"v65",
"v66",
"v67",
"v68",
"v69",
"v71",
"v73",
},
},
.kalimba = .{},
.lanai = .{
.generic = .{},
.v11 = .{},
},
.loongarch32 = .{
.generic = .{},
.generic_la32 = .{
"32bit",
},
.generic_la64 = .{
"64bit",
"ual",
},
.la464 = .{
"64bit",
"lasx",
"lbt",
"lvz",
"ual",
},
.la664 = .{
"64bit",
"frecipe",
"lasx",
"lbt",
"lvz",
"ual",
},
.loongarch64 = .{
"64bit",
"d",
"ual",
},
},
.loongarch64 = .{
.generic = .{},
.generic_la32 = .{
"32bit",
},
.generic_la64 = .{
"64bit",
"ual",
},
.la464 = .{
"64bit",
"lasx",
"lbt",
"lvz",
"ual",
},
.la664 = .{
"64bit",
"frecipe",
"lasx",
"lbt",
"lvz",
"ual",
},
.loongarch64 = .{
"64bit",
"d",
"ual",
},
},
.m68k = .{
.generic = .{
"isa_68000",
},
.M68000 = .{
"isa_68000",
},
.M68010 = .{
"isa_68010",
},
.M68020 = .{
"isa_68020",
},
.M68030 = .{
"isa_68030",
},
.M68040 = .{
"isa_68040",
},
.M68060 = .{
"isa_68060",
},
},
.mips = .{
.generic = .{
"mips32",
},
.mips1 = .{
"mips1",
},
.mips2 = .{
"mips2",
},
.mips3 = .{
"mips3",
},
.mips32 = .{
"mips32",
},
.mips32r2 = .{
"mips32r2",
},
.mips32r3 = .{
"mips32r3",
},
.mips32r5 = .{
"mips32r5",
},
.mips32r6 = .{
"mips32r6",
},
.mips4 = .{
"mips4",
},
.mips5 = .{
"mips5",
},
.mips64 = .{
"mips64",
},
.mips64r2 = .{
"mips64r2",
},
.mips64r3 = .{
"mips64r3",
},
.mips64r5 = .{
"mips64r5",
},
.mips64r6 = .{
"mips64r6",
},
.octeon = .{
"cnmips",
},
.@"octeon+" = .{
"cnmipsp",
},
.p5600 = .{
"p5600",
},
},
.mipsel = .{
.generic = .{
"mips32",
},
.mips1 = .{
"mips1",
},
.mips2 = .{
"mips2",
},
.mips3 = .{
"mips3",
},
.mips32 = .{
"mips32",
},
.mips32r2 = .{
"mips32r2",
},
.mips32r3 = .{
"mips32r3",
},
.mips32r5 = .{
"mips32r5",
},
.mips32r6 = .{
"mips32r6",
},
.mips4 = .{
"mips4",
},
.mips5 = .{
"mips5",
},
.mips64 = .{
"mips64",
},
.mips64r2 = .{
"mips64r2",
},
.mips64r3 = .{
"mips64r3",
},
.mips64r5 = .{
"mips64r5",
},
.mips64r6 = .{
"mips64r6",
},
.octeon = .{
"cnmips",
},
.@"octeon+" = .{
"cnmipsp",
},
.p5600 = .{
"p5600",
},
},
.mips64 = .{
.generic = .{
"mips32",
},
.mips1 = .{
"mips1",
},
.mips2 = .{
"mips2",
},
.mips3 = .{
"mips3",
},
.mips32 = .{
"mips32",
},
.mips32r2 = .{
"mips32r2",
},
.mips32r3 = .{
"mips32r3",
},
.mips32r5 = .{
"mips32r5",
},
.mips32r6 = .{
"mips32r6",
},
.mips4 = .{
"mips4",
},
.mips5 = .{
"mips5",
},
.mips64 = .{
"mips64",
},
.mips64r2 = .{
"mips64r2",
},
.mips64r3 = .{
"mips64r3",
},
.mips64r5 = .{
"mips64r5",
},
.mips64r6 = .{
"mips64r6",
},
.octeon = .{
"cnmips",
},
.@"octeon+" = .{
"cnmipsp",
},
.p5600 = .{
"p5600",
},
},
.mips64el = .{
.generic = .{
"mips32",
},
.mips1 = .{
"mips1",
},
.mips2 = .{
"mips2",
},
.mips3 = .{
"mips3",
},
.mips32 = .{
"mips32",
},
.mips32r2 = .{
"mips32r2",
},
.mips32r3 = .{
"mips32r3",
},
.mips32r5 = .{
"mips32r5",
},
.mips32r6 = .{
"mips32r6",
},
.mips4 = .{
"mips4",
},
.mips5 = .{
"mips5",
},
.mips64 = .{
"mips64",
},
.mips64r2 = .{
"mips64r2",
},
.mips64r3 = .{
"mips64r3",
},
.mips64r5 = .{
"mips64r5",
},
.mips64r6 = .{
"mips64r6",
},
.octeon = .{
"cnmips",
},
.@"octeon+" = .{
"cnmipsp",
},
.p5600 = .{
"p5600",
},
},
.msp430 = .{
.generic = .{},
.msp430 = .{},
.msp430x = .{
"ext",
},
},
.nvptx = .{
.sm_20 = .{
"ptx32",
"sm_20",
},
.sm_21 = .{
"ptx32",
"sm_21",
},
.sm_30 = .{
"sm_30",
},
.sm_32 = .{
"ptx40",
"sm_32",
},
.sm_35 = .{
"ptx32",
"sm_35",
},
.sm_37 = .{
"ptx41",
"sm_37",
},
.sm_50 = .{
"ptx40",
"sm_50",
},
.sm_52 = .{
"ptx41",
"sm_52",
},
.sm_53 = .{
"ptx42",
"sm_53",
},
.sm_60 = .{
"ptx50",
"sm_60",
},
.sm_61 = .{
"ptx50",
"sm_61",
},
.sm_62 = .{
"ptx50",
"sm_62",
},
.sm_70 = .{
"ptx60",
"sm_70",
},
.sm_72 = .{
"ptx61",
"sm_72",
},
.sm_75 = .{
"ptx63",
"sm_75",
},
.sm_80 = .{
"ptx70",
"sm_80",
},
.sm_86 = .{
"ptx71",
"sm_86",
},
.sm_87 = .{
"ptx74",
"sm_87",
},
.sm_89 = .{
"ptx78",
"sm_89",
},
.sm_90 = .{
"ptx78",
"sm_90",
},
.sm_90a = .{
"ptx80",
"sm_90a",
},
},
.nvptx64 = .{
.sm_20 = .{
"ptx32",
"sm_20",
},
.sm_21 = .{
"ptx32",
"sm_21",
},
.sm_30 = .{
"sm_30",
},
.sm_32 = .{
"ptx40",
"sm_32",
},
.sm_35 = .{
"ptx32",
"sm_35",
},
.sm_37 = .{
"ptx41",
"sm_37",
},
.sm_50 = .{
"ptx40",
"sm_50",
},
.sm_52 = .{
"ptx41",
"sm_52",
},
.sm_53 = .{
"ptx42",
"sm_53",
},
.sm_60 = .{
"ptx50",
"sm_60",
},
.sm_61 = .{
"ptx50",
"sm_61",
},
.sm_62 = .{
"ptx50",
"sm_62",
},
.sm_70 = .{
"ptx60",
"sm_70",
},
.sm_72 = .{
"ptx61",
"sm_72",
},
.sm_75 = .{
"ptx63",
"sm_75",
},
.sm_80 = .{
"ptx70",
"sm_80",
},
.sm_86 = .{
"ptx71",
"sm_86",
},
.sm_87 = .{
"ptx74",
"sm_87",
},
.sm_89 = .{
"ptx78",
"sm_89",
},
.sm_90 = .{
"ptx78",
"sm_90",
},
.sm_90a = .{
"ptx80",
"sm_90a",
},
},
.powerpc = .{
.@"440" = .{
"fres",
"frsqrte",
"isel",
"msync",
},
.@"450" = .{
"fres",
"frsqrte",
"isel",
"msync",
},
.@"601" = .{
"fpu",
},
.@"602" = .{
"fpu",
},
.@"603" = .{
"fres",
"frsqrte",
},
.@"603e" = .{
"fres",
"frsqrte",
},
.@"603ev" = .{
"fres",
"frsqrte",
},
.@"604" = .{
"fres",
"frsqrte",
},
.@"604e" = .{
"fres",
"frsqrte",
},
.@"620" = .{
"fres",
"frsqrte",
},
.@"7400" = .{
"altivec",
"fres",
"frsqrte",
},
.@"7450" = .{
"altivec",
"fres",
"frsqrte",
},
.@"750" = .{
"fres",
"frsqrte",
},
.@"970" = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.a2 = .{
"64bit",
"booke",
"cmpb",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"recipprec",
"slow_popcntd",
"stfiwx",
},
.e500 = .{
"isel",
"msync",
"spe",
},
.e500mc = .{
"booke",
"isel",
"stfiwx",
},
.e5500 = .{
"64bit",
"booke",
"isel",
"mfocrf",
"stfiwx",
},
.future = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_future_instructions",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.g3 = .{
"fres",
"frsqrte",
},
.g4 = .{
"altivec",
"fres",
"frsqrte",
},
.@"g4+" = .{
"altivec",
"fres",
"frsqrte",
},
.g5 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.generic = .{
"hard_float",
},
.ppc = .{
"hard_float",
},
.ppc64 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.ppc64le = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_addi_load",
"fuse_addis_load",
"htm",
"icbt",
"isa_v206_instructions",
"isa_v207_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power8_vector",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr10 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr11 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr3 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"mfocrf",
"stfiwx",
},
.pwr4 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr5 = .{
"64bit",
"altivec",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr5x = .{
"64bit",
"altivec",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr6 = .{
"64bit",
"altivec",
"cmpb",
"fcpsgn",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"lfiwax",
"mfocrf",
"recipprec",
"stfiwx",
},
.pwr6x = .{
"64bit",
"altivec",
"cmpb",
"fcpsgn",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"lfiwax",
"mfocrf",
"recipprec",
"stfiwx",
},
.pwr7 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"popcntd",
"recipprec",
"stfiwx",
"two_const_nr",
"vsx",
},
.pwr8 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_addi_load",
"fuse_addis_load",
"htm",
"icbt",
"isa_v206_instructions",
"isa_v207_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power8_vector",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr9 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power9_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
"vectors_use_two_units",
},
},
.powerpcle = .{
.@"440" = .{
"fres",
"frsqrte",
"isel",
"msync",
},
.@"450" = .{
"fres",
"frsqrte",
"isel",
"msync",
},
.@"601" = .{
"fpu",
},
.@"602" = .{
"fpu",
},
.@"603" = .{
"fres",
"frsqrte",
},
.@"603e" = .{
"fres",
"frsqrte",
},
.@"603ev" = .{
"fres",
"frsqrte",
},
.@"604" = .{
"fres",
"frsqrte",
},
.@"604e" = .{
"fres",
"frsqrte",
},
.@"620" = .{
"fres",
"frsqrte",
},
.@"7400" = .{
"altivec",
"fres",
"frsqrte",
},
.@"7450" = .{
"altivec",
"fres",
"frsqrte",
},
.@"750" = .{
"fres",
"frsqrte",
},
.@"970" = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.a2 = .{
"64bit",
"booke",
"cmpb",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"recipprec",
"slow_popcntd",
"stfiwx",
},
.e500 = .{
"isel",
"msync",
"spe",
},
.e500mc = .{
"booke",
"isel",
"stfiwx",
},
.e5500 = .{
"64bit",
"booke",
"isel",
"mfocrf",
"stfiwx",
},
.future = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_future_instructions",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.g3 = .{
"fres",
"frsqrte",
},
.g4 = .{
"altivec",
"fres",
"frsqrte",
},
.@"g4+" = .{
"altivec",
"fres",
"frsqrte",
},
.g5 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.generic = .{
"hard_float",
},
.ppc = .{
"hard_float",
},
.ppc64 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.ppc64le = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_addi_load",
"fuse_addis_load",
"htm",
"icbt",
"isa_v206_instructions",
"isa_v207_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power8_vector",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr10 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr11 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr3 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"mfocrf",
"stfiwx",
},
.pwr4 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr5 = .{
"64bit",
"altivec",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr5x = .{
"64bit",
"altivec",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr6 = .{
"64bit",
"altivec",
"cmpb",
"fcpsgn",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"lfiwax",
"mfocrf",
"recipprec",
"stfiwx",
},
.pwr6x = .{
"64bit",
"altivec",
"cmpb",
"fcpsgn",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"lfiwax",
"mfocrf",
"recipprec",
"stfiwx",
},
.pwr7 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"popcntd",
"recipprec",
"stfiwx",
"two_const_nr",
"vsx",
},
.pwr8 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_addi_load",
"fuse_addis_load",
"htm",
"icbt",
"isa_v206_instructions",
"isa_v207_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power8_vector",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr9 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power9_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
"vectors_use_two_units",
},
},
.powerpc64 = .{
.@"440" = .{
"fres",
"frsqrte",
"isel",
"msync",
},
.@"450" = .{
"fres",
"frsqrte",
"isel",
"msync",
},
.@"601" = .{
"fpu",
},
.@"602" = .{
"fpu",
},
.@"603" = .{
"fres",
"frsqrte",
},
.@"603e" = .{
"fres",
"frsqrte",
},
.@"603ev" = .{
"fres",
"frsqrte",
},
.@"604" = .{
"fres",
"frsqrte",
},
.@"604e" = .{
"fres",
"frsqrte",
},
.@"620" = .{
"fres",
"frsqrte",
},
.@"7400" = .{
"altivec",
"fres",
"frsqrte",
},
.@"7450" = .{
"altivec",
"fres",
"frsqrte",
},
.@"750" = .{
"fres",
"frsqrte",
},
.@"970" = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.a2 = .{
"64bit",
"booke",
"cmpb",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"recipprec",
"slow_popcntd",
"stfiwx",
},
.e500 = .{
"isel",
"msync",
"spe",
},
.e500mc = .{
"booke",
"isel",
"stfiwx",
},
.e5500 = .{
"64bit",
"booke",
"isel",
"mfocrf",
"stfiwx",
},
.future = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_future_instructions",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.g3 = .{
"fres",
"frsqrte",
},
.g4 = .{
"altivec",
"fres",
"frsqrte",
},
.@"g4+" = .{
"altivec",
"fres",
"frsqrte",
},
.g5 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.generic = .{
"hard_float",
},
.ppc = .{
"hard_float",
},
.ppc64 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.ppc64le = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_addi_load",
"fuse_addis_load",
"htm",
"icbt",
"isa_v206_instructions",
"isa_v207_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power8_vector",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr10 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr11 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr3 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"mfocrf",
"stfiwx",
},
.pwr4 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr5 = .{
"64bit",
"altivec",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr5x = .{
"64bit",
"altivec",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr6 = .{
"64bit",
"altivec",
"cmpb",
"fcpsgn",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"lfiwax",
"mfocrf",
"recipprec",
"stfiwx",
},
.pwr6x = .{
"64bit",
"altivec",
"cmpb",
"fcpsgn",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"lfiwax",
"mfocrf",
"recipprec",
"stfiwx",
},
.pwr7 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"popcntd",
"recipprec",
"stfiwx",
"two_const_nr",
"vsx",
},
.pwr8 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_addi_load",
"fuse_addis_load",
"htm",
"icbt",
"isa_v206_instructions",
"isa_v207_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power8_vector",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr9 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power9_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
"vectors_use_two_units",
},
},
.powerpc64le = .{
.@"440" = .{
"fres",
"frsqrte",
"isel",
"msync",
},
.@"450" = .{
"fres",
"frsqrte",
"isel",
"msync",
},
.@"601" = .{
"fpu",
},
.@"602" = .{
"fpu",
},
.@"603" = .{
"fres",
"frsqrte",
},
.@"603e" = .{
"fres",
"frsqrte",
},
.@"603ev" = .{
"fres",
"frsqrte",
},
.@"604" = .{
"fres",
"frsqrte",
},
.@"604e" = .{
"fres",
"frsqrte",
},
.@"620" = .{
"fres",
"frsqrte",
},
.@"7400" = .{
"altivec",
"fres",
"frsqrte",
},
.@"7450" = .{
"altivec",
"fres",
"frsqrte",
},
.@"750" = .{
"fres",
"frsqrte",
},
.@"970" = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.a2 = .{
"64bit",
"booke",
"cmpb",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"recipprec",
"slow_popcntd",
"stfiwx",
},
.e500 = .{
"isel",
"msync",
"spe",
},
.e500mc = .{
"booke",
"isel",
"stfiwx",
},
.e5500 = .{
"64bit",
"booke",
"isel",
"mfocrf",
"stfiwx",
},
.future = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_future_instructions",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.g3 = .{
"fres",
"frsqrte",
},
.g4 = .{
"altivec",
"fres",
"frsqrte",
},
.@"g4+" = .{
"altivec",
"fres",
"frsqrte",
},
.g5 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.generic = .{
"hard_float",
},
.ppc = .{
"hard_float",
},
.ppc64 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.ppc64le = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_addi_load",
"fuse_addis_load",
"htm",
"icbt",
"isa_v206_instructions",
"isa_v207_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power8_vector",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr10 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr11 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fast_MFLR",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_arith_add",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"mma",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr3 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"mfocrf",
"stfiwx",
},
.pwr4 = .{
"64bit",
"altivec",
"fres",
"frsqrte",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr5 = .{
"64bit",
"altivec",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr5x = .{
"64bit",
"altivec",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"mfocrf",
"stfiwx",
},
.pwr6 = .{
"64bit",
"altivec",
"cmpb",
"fcpsgn",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"lfiwax",
"mfocrf",
"recipprec",
"stfiwx",
},
.pwr6x = .{
"64bit",
"altivec",
"cmpb",
"fcpsgn",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"lfiwax",
"mfocrf",
"recipprec",
"stfiwx",
},
.pwr7 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"popcntd",
"recipprec",
"stfiwx",
"two_const_nr",
"vsx",
},
.pwr8 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_addi_load",
"fuse_addis_load",
"htm",
"icbt",
"isa_v206_instructions",
"isa_v207_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power8_vector",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
},
.pwr9 = .{
"64bit",
"allow_unaligned_fp_access",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"extdiv",
"fcpsgn",
"fpcvt",
"fprnd",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"htm",
"icbt",
"isa_v206_instructions",
"isel",
"ldbrx",
"lfiwax",
"mfocrf",
"partword_atomics",
"popcntd",
"power9_vector",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"quadword_atomics",
"recipprec",
"stfiwx",
"two_const_nr",
"vectors_use_two_units",
},
},
.propeller = .{},
.riscv32 = .{
.baseline_rv32 = .{
"32bit",
"a",
"c",
"d",
"i",
"m",
},
.baseline_rv64 = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
},
.generic = .{},
.generic_rv32 = .{
"32bit",
"i",
},
.generic_rv64 = .{
"64bit",
"i",
},
.rocket = .{},
.rocket_rv32 = .{
"32bit",
"i",
"zicsr",
"zifencei",
},
.rocket_rv64 = .{
"64bit",
"i",
"zicsr",
"zifencei",
},
.sifive_7_series = .{
"no_default_unroll",
"short_forward_branch_opt",
"use_postra_scheduler",
},
.sifive_e20 = .{
"32bit",
"c",
"i",
"m",
"zicsr",
"zifencei",
},
.sifive_e21 = .{
"32bit",
"a",
"c",
"i",
"m",
"zicsr",
"zifencei",
},
.sifive_e24 = .{
"32bit",
"a",
"c",
"f",
"i",
"m",
"zifencei",
},
.sifive_e31 = .{
"32bit",
"a",
"c",
"i",
"m",
"zicsr",
"zifencei",
},
.sifive_e34 = .{
"32bit",
"a",
"c",
"f",
"i",
"m",
"zifencei",
},
.sifive_e76 = .{
"32bit",
"a",
"c",
"f",
"i",
"m",
"no_default_unroll",
"short_forward_branch_opt",
"use_postra_scheduler",
"zifencei",
},
.sifive_p450 = .{
"64bit",
"a",
"auipc_addi_fusion",
"c",
"conditional_cmv_fusion",
"d",
"i",
"lui_addi_fusion",
"m",
"no_default_unroll",
"unaligned_scalar_mem",
"unaligned_vector_mem",
"use_postra_scheduler",
"za64rs",
"zba",
"zbb",
"zbs",
"zfhmin",
"zic64b",
"zicbom",
"zicbop",
"zicboz",
"ziccamoa",
"ziccif",
"zicclsm",
"ziccrse",
"zifencei",
"zihintntl",
"zihintpause",
"zihpm",
},
.sifive_p670 = .{
"64bit",
"a",
"auipc_addi_fusion",
"c",
"conditional_cmv_fusion",
"i",
"lui_addi_fusion",
"m",
"no_default_unroll",
"no_sink_splat_operands",
"unaligned_scalar_mem",
"unaligned_vector_mem",
"use_postra_scheduler",
"v",
"za64rs",
"zba",
"zbb",
"zbs",
"zfhmin",
"zic64b",
"zicbom",
"zicbop",
"zicboz",
"ziccamoa",
"ziccif",
"zicclsm",
"ziccrse",
"zifencei",
"zihintntl",
"zihintpause",
"zihpm",
"zvbb",
"zvknc",
"zvkng",
"zvksc",
"zvksg",
},
.sifive_s21 = .{
"64bit",
"a",
"c",
"i",
"m",
"zicsr",
"zifencei",
},
.sifive_s51 = .{
"64bit",
"a",
"c",
"i",
"m",
"zicsr",
"zifencei",
},
.sifive_s54 = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
"zifencei",
},
.sifive_s76 = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
"no_default_unroll",
"short_forward_branch_opt",
"use_postra_scheduler",
"zifencei",
"zihintpause",
},
.sifive_u54 = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
"zifencei",
},
.sifive_u74 = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
"no_default_unroll",
"short_forward_branch_opt",
"use_postra_scheduler",
"zifencei",
},
.sifive_x280 = .{
"64bit",
"a",
"c",
"dlen_factor_2",
"i",
"m",
"no_default_unroll",
"optimized_zero_stride_load",
"short_forward_branch_opt",
"use_postra_scheduler",
"v",
"zba",
"zbb",
"zfh",
"zifencei",
"zvfh",
"zvl512b",
},
.spacemit_x60 = .{
"64bit",
"a",
"c",
"dlen_factor_2",
"i",
"m",
"ssccptr",
"sscofpmf",
"sscounterenw",
"sstc",
"sstvala",
"sstvecd",
"svade",
"svbare",
"svinval",
"svnapot",
"svpbmt",
"v",
"za64rs",
"zba",
"zbb",
"zbc",
"zbkc",
"zbs",
"zfh",
"zic64b",
"zicbom",
"zicbop",
"zicboz",
"ziccamoa",
"ziccif",
"zicclsm",
"ziccrse",
"zicntr",
"zicond",
"zifencei",
"zihintpause",
"zihpm",
"zkt",
"zvfh",
"zvkt",
"zvl256b",
},
.syntacore_scr1_base = .{
"32bit",
"c",
"i",
"no_default_unroll",
"zicsr",
"zifencei",
},
.syntacore_scr1_max = .{
"32bit",
"c",
"i",
"m",
"no_default_unroll",
"zicsr",
"zifencei",
},
.syntacore_scr3_rv32 = .{
"32bit",
"c",
"i",
"m",
"no_default_unroll",
"use_postra_scheduler",
"zicsr",
"zifencei",
},
.syntacore_scr3_rv64 = .{
"64bit",
"a",
"c",
"i",
"m",
"no_default_unroll",
"use_postra_scheduler",
"zicsr",
"zifencei",
},
.veyron_v1 = .{
"64bit",
"a",
"auipc_addi_fusion",
"c",
"d",
"i",
"ld_add_fusion",
"lui_addi_fusion",
"m",
"shifted_zextw_fusion",
"ventana_veyron",
"xventanacondops",
"zba",
"zbb",
"zbc",
"zbs",
"zexth_fusion",
"zextw_fusion",
"zicbom",
"zicbop",
"zicboz",
"zicntr",
"zifencei",
"zihintpause",
"zihpm",
},
.xiangshan_nanhu = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
"no_default_unroll",
"shifted_zextw_fusion",
"svinval",
"zba",
"zbb",
"zbc",
"zbs",
"zexth_fusion",
"zextw_fusion",
"zicbom",
"zicboz",
"zifencei",
"zkn",
"zksed",
"zksh",
},
},
.riscv64 = .{
.baseline_rv32 = .{
"32bit",
"a",
"c",
"d",
"i",
"m",
},
.baseline_rv64 = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
},
.generic = .{},
.generic_rv32 = .{
"32bit",
"i",
},
.generic_rv64 = .{
"64bit",
"i",
},
.rocket = .{},
.rocket_rv32 = .{
"32bit",
"i",
"zicsr",
"zifencei",
},
.rocket_rv64 = .{
"64bit",
"i",
"zicsr",
"zifencei",
},
.sifive_7_series = .{
"no_default_unroll",
"short_forward_branch_opt",
"use_postra_scheduler",
},
.sifive_e20 = .{
"32bit",
"c",
"i",
"m",
"zicsr",
"zifencei",
},
.sifive_e21 = .{
"32bit",
"a",
"c",
"i",
"m",
"zicsr",
"zifencei",
},
.sifive_e24 = .{
"32bit",
"a",
"c",
"f",
"i",
"m",
"zifencei",
},
.sifive_e31 = .{
"32bit",
"a",
"c",
"i",
"m",
"zicsr",
"zifencei",
},
.sifive_e34 = .{
"32bit",
"a",
"c",
"f",
"i",
"m",
"zifencei",
},
.sifive_e76 = .{
"32bit",
"a",
"c",
"f",
"i",
"m",
"no_default_unroll",
"short_forward_branch_opt",
"use_postra_scheduler",
"zifencei",
},
.sifive_p450 = .{
"64bit",
"a",
"auipc_addi_fusion",
"c",
"conditional_cmv_fusion",
"d",
"i",
"lui_addi_fusion",
"m",
"no_default_unroll",
"unaligned_scalar_mem",
"unaligned_vector_mem",
"use_postra_scheduler",
"za64rs",
"zba",
"zbb",
"zbs",
"zfhmin",
"zic64b",
"zicbom",
"zicbop",
"zicboz",
"ziccamoa",
"ziccif",
"zicclsm",
"ziccrse",
"zifencei",
"zihintntl",
"zihintpause",
"zihpm",
},
.sifive_p670 = .{
"64bit",
"a",
"auipc_addi_fusion",
"c",
"conditional_cmv_fusion",
"i",
"lui_addi_fusion",
"m",
"no_default_unroll",
"no_sink_splat_operands",
"unaligned_scalar_mem",
"unaligned_vector_mem",
"use_postra_scheduler",
"v",
"za64rs",
"zba",
"zbb",
"zbs",
"zfhmin",
"zic64b",
"zicbom",
"zicbop",
"zicboz",
"ziccamoa",
"ziccif",
"zicclsm",
"ziccrse",
"zifencei",
"zihintntl",
"zihintpause",
"zihpm",
"zvbb",
"zvknc",
"zvkng",
"zvksc",
"zvksg",
},
.sifive_s21 = .{
"64bit",
"a",
"c",
"i",
"m",
"zicsr",
"zifencei",
},
.sifive_s51 = .{
"64bit",
"a",
"c",
"i",
"m",
"zicsr",
"zifencei",
},
.sifive_s54 = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
"zifencei",
},
.sifive_s76 = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
"no_default_unroll",
"short_forward_branch_opt",
"use_postra_scheduler",
"zifencei",
"zihintpause",
},
.sifive_u54 = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
"zifencei",
},
.sifive_u74 = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
"no_default_unroll",
"short_forward_branch_opt",
"use_postra_scheduler",
"zifencei",
},
.sifive_x280 = .{
"64bit",
"a",
"c",
"dlen_factor_2",
"i",
"m",
"no_default_unroll",
"optimized_zero_stride_load",
"short_forward_branch_opt",
"use_postra_scheduler",
"v",
"zba",
"zbb",
"zfh",
"zifencei",
"zvfh",
"zvl512b",
},
.spacemit_x60 = .{
"64bit",
"a",
"c",
"dlen_factor_2",
"i",
"m",
"ssccptr",
"sscofpmf",
"sscounterenw",
"sstc",
"sstvala",
"sstvecd",
"svade",
"svbare",
"svinval",
"svnapot",
"svpbmt",
"v",
"za64rs",
"zba",
"zbb",
"zbc",
"zbkc",
"zbs",
"zfh",
"zic64b",
"zicbom",
"zicbop",
"zicboz",
"ziccamoa",
"ziccif",
"zicclsm",
"ziccrse",
"zicntr",
"zicond",
"zifencei",
"zihintpause",
"zihpm",
"zkt",
"zvfh",
"zvkt",
"zvl256b",
},
.syntacore_scr1_base = .{
"32bit",
"c",
"i",
"no_default_unroll",
"zicsr",
"zifencei",
},
.syntacore_scr1_max = .{
"32bit",
"c",
"i",
"m",
"no_default_unroll",
"zicsr",
"zifencei",
},
.syntacore_scr3_rv32 = .{
"32bit",
"c",
"i",
"m",
"no_default_unroll",
"use_postra_scheduler",
"zicsr",
"zifencei",
},
.syntacore_scr3_rv64 = .{
"64bit",
"a",
"c",
"i",
"m",
"no_default_unroll",
"use_postra_scheduler",
"zicsr",
"zifencei",
},
.veyron_v1 = .{
"64bit",
"a",
"auipc_addi_fusion",
"c",
"d",
"i",
"ld_add_fusion",
"lui_addi_fusion",
"m",
"shifted_zextw_fusion",
"ventana_veyron",
"xventanacondops",
"zba",
"zbb",
"zbc",
"zbs",
"zexth_fusion",
"zextw_fusion",
"zicbom",
"zicbop",
"zicboz",
"zicntr",
"zifencei",
"zihintpause",
"zihpm",
},
.xiangshan_nanhu = .{
"64bit",
"a",
"c",
"d",
"i",
"m",
"no_default_unroll",
"shifted_zextw_fusion",
"svinval",
"zba",
"zbb",
"zbc",
"zbs",
"zexth_fusion",
"zextw_fusion",
"zicbom",
"zicboz",
"zifencei",
"zkn",
"zksed",
"zksh",
},
},
.s390x = .{
.arch10 = .{
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"execution_hint",
"fast_serialization",
"fp_extension",
"high_word",
"interlocked_access1",
"load_and_trap",
"load_store_on_cond",
"message_security_assist_extension3",
"message_security_assist_extension4",
"miscellaneous_extensions",
"population_count",
"processor_assist",
"reset_reference_bits_multiple",
"transactional_execution",
},
.arch11 = .{
"dfp_packed_conversion",
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"execution_hint",
"fast_serialization",
"fp_extension",
"high_word",
"interlocked_access1",
"load_and_trap",
"load_and_zero_rightmost_byte",
"load_store_on_cond",
"load_store_on_cond_2",
"message_security_assist_extension3",
"message_security_assist_extension4",
"message_security_assist_extension5",
"miscellaneous_extensions",
"population_count",
"processor_assist",
"reset_reference_bits_multiple",
"transactional_execution",
"vector",
},
.arch12 = .{
"dfp_packed_conversion",
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"execution_hint",
"fast_serialization",
"fp_extension",
"guarded_storage",
"high_word",
"insert_reference_bits_multiple",
"interlocked_access1",
"load_and_trap",
"load_and_zero_rightmost_byte",
"load_store_on_cond",
"load_store_on_cond_2",
"message_security_assist_extension3",
"message_security_assist_extension4",
"message_security_assist_extension5",
"message_security_assist_extension7",
"message_security_assist_extension8",
"miscellaneous_extensions",
"miscellaneous_extensions_2",
"population_count",
"processor_assist",
"reset_reference_bits_multiple",
"test_pending_external_interruption",
"transactional_execution",
"vector",
"vector_enhancements_1",
"vector_packed_decimal",
},
.arch13 = .{
"deflate_conversion",
"dfp_packed_conversion",
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"enhanced_sort",
"execution_hint",
"fast_serialization",
"fp_extension",
"guarded_storage",
"high_word",
"insert_reference_bits_multiple",
"interlocked_access1",
"load_and_trap",
"load_and_zero_rightmost_byte",
"load_store_on_cond",
"load_store_on_cond_2",
"message_security_assist_extension3",
"message_security_assist_extension4",
"message_security_assist_extension5",
"message_security_assist_extension7",
"message_security_assist_extension8",
"message_security_assist_extension9",
"miscellaneous_extensions",
"miscellaneous_extensions_2",
"miscellaneous_extensions_3",
"population_count",
"processor_assist",
"reset_reference_bits_multiple",
"test_pending_external_interruption",
"transactional_execution",
"vector",
"vector_enhancements_1",
"vector_enhancements_2",
"vector_packed_decimal",
"vector_packed_decimal_enhancement",
},
.arch14 = .{
"bear_enhancement",
"deflate_conversion",
"dfp_packed_conversion",
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"enhanced_sort",
"execution_hint",
"fast_serialization",
"fp_extension",
"guarded_storage",
"high_word",
"insert_reference_bits_multiple",
"interlocked_access1",
"load_and_trap",
"load_and_zero_rightmost_byte",
"load_store_on_cond",
"load_store_on_cond_2",
"message_security_assist_extension3",
"message_security_assist_extension4",
"message_security_assist_extension5",
"message_security_assist_extension7",
"message_security_assist_extension8",
"message_security_assist_extension9",
"miscellaneous_extensions",
"miscellaneous_extensions_2",
"miscellaneous_extensions_3",
"nnp_assist",
"population_count",
"processor_activity_instrumentation",
"processor_assist",
"reset_dat_protection",
"reset_reference_bits_multiple",
"test_pending_external_interruption",
"transactional_execution",
"vector",
"vector_enhancements_1",
"vector_enhancements_2",
"vector_packed_decimal",
"vector_packed_decimal_enhancement",
"vector_packed_decimal_enhancement_2",
},
.arch8 = .{},
.arch9 = .{
"distinct_ops",
"fast_serialization",
"fp_extension",
"high_word",
"interlocked_access1",
"load_store_on_cond",
"message_security_assist_extension3",
"message_security_assist_extension4",
"population_count",
"reset_reference_bits_multiple",
},
.generic = .{},
.z10 = .{},
.z13 = .{
"dfp_packed_conversion",
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"execution_hint",
"fast_serialization",
"fp_extension",
"high_word",
"interlocked_access1",
"load_and_trap",
"load_and_zero_rightmost_byte",
"load_store_on_cond",
"load_store_on_cond_2",
"message_security_assist_extension3",
"message_security_assist_extension4",
"message_security_assist_extension5",
"miscellaneous_extensions",
"population_count",
"processor_assist",
"reset_reference_bits_multiple",
"transactional_execution",
"vector",
},
.z14 = .{
"dfp_packed_conversion",
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"execution_hint",
"fast_serialization",
"fp_extension",
"guarded_storage",
"high_word",
"insert_reference_bits_multiple",
"interlocked_access1",
"load_and_trap",
"load_and_zero_rightmost_byte",
"load_store_on_cond",
"load_store_on_cond_2",
"message_security_assist_extension3",
"message_security_assist_extension4",
"message_security_assist_extension5",
"message_security_assist_extension7",
"message_security_assist_extension8",
"miscellaneous_extensions",
"miscellaneous_extensions_2",
"population_count",
"processor_assist",
"reset_reference_bits_multiple",
"test_pending_external_interruption",
"transactional_execution",
"vector",
"vector_enhancements_1",
"vector_packed_decimal",
},
.z15 = .{
"deflate_conversion",
"dfp_packed_conversion",
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"enhanced_sort",
"execution_hint",
"fast_serialization",
"fp_extension",
"guarded_storage",
"high_word",
"insert_reference_bits_multiple",
"interlocked_access1",
"load_and_trap",
"load_and_zero_rightmost_byte",
"load_store_on_cond",
"load_store_on_cond_2",
"message_security_assist_extension3",
"message_security_assist_extension4",
"message_security_assist_extension5",
"message_security_assist_extension7",
"message_security_assist_extension8",
"message_security_assist_extension9",
"miscellaneous_extensions",
"miscellaneous_extensions_2",
"miscellaneous_extensions_3",
"population_count",
"processor_assist",
"reset_reference_bits_multiple",
"test_pending_external_interruption",
"transactional_execution",
"vector",
"vector_enhancements_1",
"vector_enhancements_2",
"vector_packed_decimal",
"vector_packed_decimal_enhancement",
},
.z16 = .{
"bear_enhancement",
"deflate_conversion",
"dfp_packed_conversion",
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"enhanced_sort",
"execution_hint",
"fast_serialization",
"fp_extension",
"guarded_storage",
"high_word",
"insert_reference_bits_multiple",
"interlocked_access1",
"load_and_trap",
"load_and_zero_rightmost_byte",
"load_store_on_cond",
"load_store_on_cond_2",
"message_security_assist_extension3",
"message_security_assist_extension4",
"message_security_assist_extension5",
"message_security_assist_extension7",
"message_security_assist_extension8",
"message_security_assist_extension9",
"miscellaneous_extensions",
"miscellaneous_extensions_2",
"miscellaneous_extensions_3",
"nnp_assist",
"population_count",
"processor_activity_instrumentation",
"processor_assist",
"reset_dat_protection",
"reset_reference_bits_multiple",
"test_pending_external_interruption",
"transactional_execution",
"vector",
"vector_enhancements_1",
"vector_enhancements_2",
"vector_packed_decimal",
"vector_packed_decimal_enhancement",
"vector_packed_decimal_enhancement_2",
},
.z196 = .{
"distinct_ops",
"fast_serialization",
"fp_extension",
"high_word",
"interlocked_access1",
"load_store_on_cond",
"message_security_assist_extension3",
"message_security_assist_extension4",
"population_count",
"reset_reference_bits_multiple",
},
.zEC12 = .{
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"execution_hint",
"fast_serialization",
"fp_extension",
"high_word",
"interlocked_access1",
"load_and_trap",
"load_store_on_cond",
"message_security_assist_extension3",
"message_security_assist_extension4",
"miscellaneous_extensions",
"population_count",
"processor_assist",
"reset_reference_bits_multiple",
"transactional_execution",
},
},
.sparc = .{
.at697e = .{
"insertnopload",
"leon",
},
.at697f = .{
"insertnopload",
"leon",
},
.f934 = .{},
.generic = .{},
.gr712rc = .{
"hasleoncasa",
"leon",
},
.gr740 = .{
"hasleoncasa",
"hasumacsmac",
"leon",
"leoncyclecounter",
"leonpwrpsr",
},
.hypersparc = .{},
.leon2 = .{
"leon",
},
.leon3 = .{
"hasumacsmac",
"leon",
},
.leon4 = .{
"hasleoncasa",
"hasumacsmac",
"leon",
},
.ma2080 = .{
"hasleoncasa",
"leon",
},
.ma2085 = .{
"hasleoncasa",
"leon",
},
.ma2100 = .{
"hasleoncasa",
"leon",
},
.ma2150 = .{
"hasleoncasa",
"leon",
},
.ma2155 = .{
"hasleoncasa",
"leon",
},
.ma2450 = .{
"hasleoncasa",
"leon",
},
.ma2455 = .{
"hasleoncasa",
"leon",
},
.ma2480 = .{
"hasleoncasa",
"leon",
},
.ma2485 = .{
"hasleoncasa",
"leon",
},
.ma2x5x = .{
"hasleoncasa",
"leon",
},
.ma2x8x = .{
"hasleoncasa",
"leon",
},
.myriad2 = .{
"hasleoncasa",
"leon",
},
.myriad2_1 = .{
"hasleoncasa",
"leon",
},
.myriad2_2 = .{
"hasleoncasa",
"leon",
},
.myriad2_3 = .{
"hasleoncasa",
"leon",
},
.niagara = .{
"deprecated_v8",
"v9",
"vis",
"vis2",
},
.niagara2 = .{
"deprecated_v8",
"popc",
"v9",
"vis",
"vis2",
},
.niagara3 = .{
"deprecated_v8",
"popc",
"v9",
"vis",
"vis2",
},
.niagara4 = .{
"deprecated_v8",
"popc",
"v9",
"vis",
"vis2",
"vis3",
},
.sparclet = .{},
.sparclite = .{},
.sparclite86x = .{},
.supersparc = .{},
.tsc701 = .{},
.ultrasparc = .{
"deprecated_v8",
"slow_rdpc",
"vis",
},
.ultrasparc3 = .{
"deprecated_v8",
"slow_rdpc",
"vis",
"vis2",
},
.ut699 = .{
"fixallfdivsqrt",
"insertnopload",
"leon",
"no_fmuls",
"no_fsmuld",
},
.v7 = .{
"no_fsmuld",
"soft_mul_div",
},
.v8 = .{},
.v9 = .{
"v9",
},
},
.sparc64 = .{
.at697e = .{
"insertnopload",
"leon",
},
.at697f = .{
"insertnopload",
"leon",
},
.f934 = .{},
.generic = .{},
.gr712rc = .{
"hasleoncasa",
"leon",
},
.gr740 = .{
"hasleoncasa",
"hasumacsmac",
"leon",
"leoncyclecounter",
"leonpwrpsr",
},
.hypersparc = .{},
.leon2 = .{
"leon",
},
.leon3 = .{
"hasumacsmac",
"leon",
},
.leon4 = .{
"hasleoncasa",
"hasumacsmac",
"leon",
},
.ma2080 = .{
"hasleoncasa",
"leon",
},
.ma2085 = .{
"hasleoncasa",
"leon",
},
.ma2100 = .{
"hasleoncasa",
"leon",
},
.ma2150 = .{
"hasleoncasa",
"leon",
},
.ma2155 = .{
"hasleoncasa",
"leon",
},
.ma2450 = .{
"hasleoncasa",
"leon",
},
.ma2455 = .{
"hasleoncasa",
"leon",
},
.ma2480 = .{
"hasleoncasa",
"leon",
},
.ma2485 = .{
"hasleoncasa",
"leon",
},
.ma2x5x = .{
"hasleoncasa",
"leon",
},
.ma2x8x = .{
"hasleoncasa",
"leon",
},
.myriad2 = .{
"hasleoncasa",
"leon",
},
.myriad2_1 = .{
"hasleoncasa",
"leon",
},
.myriad2_2 = .{
"hasleoncasa",
"leon",
},
.myriad2_3 = .{
"hasleoncasa",
"leon",
},
.niagara = .{
"deprecated_v8",
"v9",
"vis",
"vis2",
},
.niagara2 = .{
"deprecated_v8",
"popc",
"v9",
"vis",
"vis2",
},
.niagara3 = .{
"deprecated_v8",
"popc",
"v9",
"vis",
"vis2",
},
.niagara4 = .{
"deprecated_v8",
"popc",
"v9",
"vis",
"vis2",
"vis3",
},
.sparclet = .{},
.sparclite = .{},
.sparclite86x = .{},
.supersparc = .{},
.tsc701 = .{},
.ultrasparc = .{
"deprecated_v8",
"slow_rdpc",
"vis",
},
.ultrasparc3 = .{
"deprecated_v8",
"slow_rdpc",
"vis",
"vis2",
},
.ut699 = .{
"fixallfdivsqrt",
"insertnopload",
"leon",
"no_fmuls",
"no_fsmuld",
},
.v7 = .{
"no_fsmuld",
"soft_mul_div",
},
.v8 = .{},
.v9 = .{
"v9",
},
},
.spirv = .{
.generic = .{
"v1_0",
},
.vulkan_v1_2 = .{
"v1_5",
"addresses",
"shader",
},
.opencl_v2 = .{
"v1_2",
"addresses",
"kernel",
"generic_pointer",
},
},
.spirv32 = .{
.generic = .{
"v1_0",
},
.vulkan_v1_2 = .{
"v1_5",
"addresses",
"shader",
},
.opencl_v2 = .{
"v1_2",
"addresses",
"kernel",
"generic_pointer",
},
},
.spirv64 = .{
.generic = .{
"v1_0",
},
.vulkan_v1_2 = .{
"v1_5",
"addresses",
"shader",
},
.opencl_v2 = .{
"v1_2",
"addresses",
"kernel",
"generic_pointer",
},
},
.ve = .{
.generic = .{
"vpu",
},
},
.wasm32 = .{
.bleeding_edge = .{
"atomics",
"bulk_memory",
"exception_handling",
"extended_const",
"half_precision",
"multimemory",
"multivalue",
"mutable_globals",
"nontrapping_fptoint",
"reference_types",
"relaxed_simd",
"sign_ext",
"simd128",
"tail_call",
},
.generic = .{
"multivalue",
"mutable_globals",
"reference_types",
"sign_ext",
},
.lime1 = .{
"bulk_memory",
"extended_const",
"multivalue",
"mutable_globals",
"nontrapping_fptoint",
"sign_ext",
},
.mvp = .{},
},
.wasm64 = .{
.bleeding_edge = .{
"atomics",
"bulk_memory",
"exception_handling",
"extended_const",
"half_precision",
"multimemory",
"multivalue",
"mutable_globals",
"nontrapping_fptoint",
"reference_types",
"relaxed_simd",
"sign_ext",
"simd128",
"tail_call",
},
.generic = .{
"multivalue",
"mutable_globals",
"reference_types",
"sign_ext",
},
.lime1 = .{
"bulk_memory",
"extended_const",
"multivalue",
"mutable_globals",
"nontrapping_fptoint",
"sign_ext",
},
.mvp = .{},
},
.x86 = .{
.alderlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.amdfam10 = .{
"3dnowa",
"64bit",
"cmov",
"cx16",
"fast_scalar_shift_masks",
"fxsr",
"idivq_to_divl",
"lzcnt",
"nopl",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"sse4a",
"vzeroupper",
"x87",
},
.arrowlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.arrowlake_s = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint16",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"sha512",
"shstk",
"slow_3ops_lea",
"sm3",
"sm4",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.athlon = .{
"3dnowa",
"cmov",
"cx8",
"nopl",
"prfchw",
"slow_shld",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.athlon64 = .{
"3dnowa",
"64bit",
"cmov",
"cx8",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.athlon64_sse3 = .{
"3dnowa",
"64bit",
"cmov",
"cx16",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.athlon_4 = .{
"3dnowa",
"cmov",
"cx8",
"fxsr",
"nopl",
"prfchw",
"slow_shld",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.athlon_fx = .{
"3dnowa",
"64bit",
"cmov",
"cx8",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.athlon_mp = .{
"3dnowa",
"cmov",
"cx8",
"fxsr",
"nopl",
"prfchw",
"slow_shld",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.athlon_tbird = .{
"3dnowa",
"cmov",
"cx8",
"nopl",
"prfchw",
"slow_shld",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.athlon_xp = .{
"3dnowa",
"cmov",
"cx8",
"fxsr",
"nopl",
"prfchw",
"slow_shld",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.atom = .{
"64bit",
"cmov",
"cx16",
"fast_imm16",
"fxsr",
"idivl_to_divb",
"idivq_to_divl",
"lea_sp",
"lea_uses_ag",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pad_short_functions",
"sahf",
"slow_two_mem_ops",
"slow_unaligned_mem_16",
"ssse3",
"vzeroupper",
"x87",
},
.atom_sse4_2_movbe = .{
"64bit",
"aes",
"clflushopt",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_7bytenop",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"sha",
"slow_incdec",
"slow_lea",
"slow_pmulld",
"slow_two_mem_ops",
"sse4_2",
"use_slm_arith_costs",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.barcelona = .{
"3dnowa",
"64bit",
"cmov",
"cx16",
"fast_scalar_shift_masks",
"fxsr",
"idivq_to_divl",
"lzcnt",
"nopl",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"smap",
"smep",
"sse4a",
"vzeroupper",
"x87",
},
.bdver1 = .{
"64bit",
"aes",
"branchfusion",
"cmov",
"cx16",
"fast_11bytenop",
"fast_scalar_shift_masks",
"fxsr",
"idivq_to_divl",
"lwp",
"lzcnt",
"mmx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"vzeroupper",
"x87",
"xop",
"xsave",
},
.bdver2 = .{
"64bit",
"aes",
"bmi",
"branchfusion",
"cmov",
"cx16",
"f16c",
"fast_11bytenop",
"fast_bextr",
"fast_movbe",
"fast_scalar_shift_masks",
"fma",
"fxsr",
"idivq_to_divl",
"lwp",
"lzcnt",
"mmx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"tbm",
"vzeroupper",
"x87",
"xop",
"xsave",
},
.bdver3 = .{
"64bit",
"aes",
"bmi",
"branchfusion",
"cmov",
"cx16",
"f16c",
"fast_11bytenop",
"fast_bextr",
"fast_movbe",
"fast_scalar_shift_masks",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lwp",
"lzcnt",
"mmx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"tbm",
"vzeroupper",
"x87",
"xop",
"xsaveopt",
},
.bdver4 = .{
"64bit",
"aes",
"avx2",
"bmi",
"bmi2",
"branchfusion",
"cmov",
"cx16",
"f16c",
"fast_11bytenop",
"fast_bextr",
"fast_movbe",
"fast_scalar_shift_masks",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lwp",
"lzcnt",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"tbm",
"vzeroupper",
"x87",
"xop",
"xsaveopt",
},
.bonnell = .{
"64bit",
"cmov",
"cx16",
"fast_imm16",
"fxsr",
"idivl_to_divb",
"idivq_to_divl",
"lea_sp",
"lea_uses_ag",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pad_short_functions",
"sahf",
"slow_two_mem_ops",
"slow_unaligned_mem_16",
"ssse3",
"vzeroupper",
"x87",
},
.broadwell = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"cmov",
"cx16",
"ermsb",
"f16c",
"false_deps_lzcnt_tzcnt",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"smap",
"smep",
"vzeroupper",
"x87",
"xsaveopt",
},
.btver1 = .{
"64bit",
"cmov",
"cx16",
"fast_15bytenop",
"fast_imm16",
"fast_scalar_shift_masks",
"fast_vector_shift_masks",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"nopl",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"sse4a",
"ssse3",
"vzeroupper",
"x87",
},
.btver2 = .{
"64bit",
"aes",
"bmi",
"cmov",
"cx16",
"f16c",
"fast_15bytenop",
"fast_bextr",
"fast_hops",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_shift_masks",
"fast_vector_shift_masks",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"movbe",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"sse4a",
"x87",
"xsaveopt",
},
.c3 = .{
"3dnow",
"prfchw",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.c3_2 = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.cannonlake = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vl",
"bmi",
"bmi2",
"clflushopt",
"cmov",
"cx16",
"ermsb",
"evex512",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"sha",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.cascadelake = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512vl",
"avx512vnni",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"faster_shift_than_shuffle",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.clearwaterforest = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint16",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prefetchi",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"sha512",
"shstk",
"slow_3ops_lea",
"sm3",
"sm4",
"tuning_fast_imm_vector_shift",
"uintr",
"usermsr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.cooperlake = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx512bf16",
"avx512cd",
"avx512dq",
"avx512vl",
"avx512vnni",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"faster_shift_than_shuffle",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"tuning_fast_imm_vector_shift",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.core2 = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"macrofusion",
"mmx",
"nopl",
"sahf",
"slow_unaligned_mem_16",
"ssse3",
"vzeroupper",
"x87",
},
.corei7 = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"no_bypass_delay_mov",
"nopl",
"popcnt",
"sahf",
"sse4_2",
"vzeroupper",
"x87",
},
.emeraldrapids = .{
"64bit",
"adx",
"allow_light_256_bit",
"amx_bf16",
"amx_int8",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512fp16",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vnni",
"avx512vpopcntdq",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"enqcmd",
"ermsb",
"evex512",
"false_deps_getmant",
"false_deps_mulc",
"false_deps_mullq",
"false_deps_perm",
"false_deps_range",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"smap",
"smep",
"tsxldtrk",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.generic = .{
"64bit",
"cx8",
"fast_15bytenop",
"fast_scalar_fsqrt",
"idivq_to_divl",
"macrofusion",
"slow_3ops_lea",
"vzeroupper",
"x87",
},
.geode = .{
"3dnowa",
"cx8",
"prfchw",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.goldmont = .{
"64bit",
"aes",
"clflushopt",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"sha",
"slow_incdec",
"slow_lea",
"slow_two_mem_ops",
"smap",
"smep",
"sse4_2",
"use_glm_div_sqrt_costs",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.goldmont_plus = .{
"64bit",
"aes",
"clflushopt",
"cmov",
"cx16",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"slow_incdec",
"slow_lea",
"slow_two_mem_ops",
"sse4_2",
"use_glm_div_sqrt_costs",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.gracemont = .{
"64bit",
"adx",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"f16c",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"nopl",
"pconfig",
"pku",
"popcnt",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.grandridge = .{
"64bit",
"adx",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"nopl",
"pconfig",
"pku",
"popcnt",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.graniterapids = .{
"64bit",
"adx",
"allow_light_256_bit",
"amx_bf16",
"amx_fp16",
"amx_int8",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512fp16",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vnni",
"avx512vpopcntdq",
"avxvnni",
"bmi",
"bmi2",
"branch_hint",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"enqcmd",
"ermsb",
"evex512",
"false_deps_getmant",
"false_deps_mulc",
"false_deps_mullq",
"false_deps_perm",
"false_deps_range",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_256_bit",
"prefetchi",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"tsxldtrk",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.graniterapids_d = .{
"64bit",
"adx",
"allow_light_256_bit",
"amx_bf16",
"amx_complex",
"amx_fp16",
"amx_int8",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512fp16",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vnni",
"avx512vpopcntdq",
"avxvnni",
"bmi",
"bmi2",
"branch_hint",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"enqcmd",
"ermsb",
"evex512",
"false_deps_getmant",
"false_deps_mulc",
"false_deps_mullq",
"false_deps_perm",
"false_deps_range",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_256_bit",
"prefetchi",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"tsxldtrk",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.haswell = .{
"64bit",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"cmov",
"cx16",
"ermsb",
"f16c",
"false_deps_lzcnt_tzcnt",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"popcnt",
"rdrnd",
"sahf",
"slow_3ops_lea",
"smep",
"vzeroupper",
"x87",
"xsaveopt",
},
.i386 = .{
"bsf_bsr_0_clobbers_result",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.i486 = .{
"bsf_bsr_0_clobbers_result",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.i586 = .{
"cx8",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.i686 = .{
"cmov",
"cx8",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.icelake_client = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vpopcntdq",
"bmi",
"bmi2",
"clflushopt",
"cmov",
"cx16",
"ermsb",
"evex512",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.icelake_server = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vpopcntdq",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.ivybridge = .{
"64bit",
"cmov",
"cx16",
"f16c",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"no_bypass_delay_mov",
"nopl",
"pclmul",
"popcnt",
"rdrnd",
"sahf",
"slow_3ops_lea",
"slow_unaligned_mem_32",
"smep",
"vzeroupper",
"x87",
"xsaveopt",
},
.k6 = .{
"cx8",
"mmx",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.k6_2 = .{
"3dnow",
"cx8",
"prfchw",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.k6_3 = .{
"3dnow",
"cx8",
"prfchw",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.k8 = .{
"3dnowa",
"64bit",
"cmov",
"cx8",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.k8_sse3 = .{
"3dnowa",
"64bit",
"cmov",
"cx16",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.knl = .{
"64bit",
"adx",
"aes",
"avx512cd",
"avx512er",
"avx512pf",
"bmi",
"bmi2",
"cmov",
"cx16",
"evex512",
"fast_gather",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"movbe",
"nopl",
"pclmul",
"popcnt",
"prefer_mask_registers",
"prefetchwt1",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"slow_incdec",
"slow_pmaddwd",
"slow_two_mem_ops",
"x87",
"xsaveopt",
},
.knm = .{
"64bit",
"adx",
"aes",
"avx512cd",
"avx512er",
"avx512pf",
"avx512vpopcntdq",
"bmi",
"bmi2",
"cmov",
"cx16",
"evex512",
"fast_gather",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"movbe",
"nopl",
"pclmul",
"popcnt",
"prefer_mask_registers",
"prefetchwt1",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"slow_incdec",
"slow_pmaddwd",
"slow_two_mem_ops",
"x87",
"xsaveopt",
},
.lakemont = .{
"cx8",
"slow_unaligned_mem_16",
"soft_float",
"vzeroupper",
},
.lunarlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint16",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"sha512",
"shstk",
"slow_3ops_lea",
"sm3",
"sm4",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.meteorlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.nehalem = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"no_bypass_delay_mov",
"nopl",
"popcnt",
"sahf",
"sse4_2",
"vzeroupper",
"x87",
},
.nocona = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.opteron = .{
"3dnowa",
"64bit",
"cmov",
"cx8",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.opteron_sse3 = .{
"3dnowa",
"64bit",
"cmov",
"cx16",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.pantherlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint16",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prefetchi",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"sha512",
"shstk",
"slow_3ops_lea",
"sm3",
"sm4",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.penryn = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"macrofusion",
"mmx",
"nopl",
"sahf",
"slow_unaligned_mem_16",
"sse4_1",
"vzeroupper",
"x87",
},
.pentium = .{
"cx8",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.pentium2 = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.pentium3 = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.pentium3m = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.pentium4 = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.pentium_m = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.pentium_mmx = .{
"cx8",
"mmx",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.pentiumpro = .{
"cmov",
"cx8",
"nopl",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.prescott = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.raptorlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.rocketlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vpopcntdq",
"bmi",
"bmi2",
"clflushopt",
"cmov",
"cx16",
"ermsb",
"evex512",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.sandybridge = .{
"64bit",
"avx",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"no_bypass_delay_mov",
"nopl",
"pclmul",
"popcnt",
"sahf",
"slow_3ops_lea",
"slow_unaligned_mem_32",
"vzeroupper",
"x87",
"xsaveopt",
},
.sapphirerapids = .{
"64bit",
"adx",
"allow_light_256_bit",
"amx_bf16",
"amx_int8",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512fp16",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vnni",
"avx512vpopcntdq",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"enqcmd",
"ermsb",
"evex512",
"false_deps_getmant",
"false_deps_mulc",
"false_deps_mullq",
"false_deps_perm",
"false_deps_range",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"smap",
"smep",
"tsxldtrk",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.sierraforest = .{
"64bit",
"adx",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"nopl",
"pconfig",
"pku",
"popcnt",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.silvermont = .{
"64bit",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_7bytenop",
"fast_imm16",
"fast_movbe",
"fxsr",
"idivq_to_divl",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"sahf",
"slow_incdec",
"slow_lea",
"slow_pmulld",
"slow_two_mem_ops",
"smep",
"sse4_2",
"use_slm_arith_costs",
"vzeroupper",
"x87",
},
.skx = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512vl",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"faster_shift_than_shuffle",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.skylake = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"clflushopt",
"cmov",
"cx16",
"ermsb",
"f16c",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"smap",
"smep",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.skylake_avx512 = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512vl",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"faster_shift_than_shuffle",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"tuning_fast_imm_vector_shift",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.slm = .{
"64bit",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_7bytenop",
"fast_imm16",
"fast_movbe",
"fxsr",
"idivq_to_divl",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"sahf",
"slow_incdec",
"slow_lea",
"slow_pmulld",
"slow_two_mem_ops",
"sse4_2",
"use_slm_arith_costs",
"vzeroupper",
"x87",
},
.tigerlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vp2intersect",
"avx512vpopcntdq",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"shstk",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.tremont = .{
"64bit",
"aes",
"clflushopt",
"clwb",
"cmov",
"cx16",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"gfni",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"slow_incdec",
"slow_lea",
"slow_two_mem_ops",
"sse4_2",
"use_glm_div_sqrt_costs",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.westmere = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"no_bypass_delay_mov",
"nopl",
"pclmul",
"popcnt",
"sahf",
"sse4_2",
"vzeroupper",
"x87",
},
.winchip2 = .{
"3dnow",
"prfchw",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.winchip_c6 = .{
"mmx",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.x86_64 = .{
"64bit",
"cmov",
"cx8",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"nopl",
"slow_3ops_lea",
"slow_incdec",
"sse2",
"vzeroupper",
"x87",
},
.x86_64_v2 = .{
"64bit",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"nopl",
"popcnt",
"sahf",
"slow_3ops_lea",
"slow_unaligned_mem_32",
"sse4_2",
"vzeroupper",
"x87",
},
.x86_64_v3 = .{
"64bit",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"cmov",
"cx16",
"f16c",
"false_deps_lzcnt_tzcnt",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fma",
"fxsr",
"idivq_to_divl",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"nopl",
"popcnt",
"sahf",
"slow_3ops_lea",
"vzeroupper",
"x87",
"xsave",
},
.x86_64_v4 = .{
"64bit",
"allow_light_256_bit",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512vl",
"bmi",
"bmi2",
"cmov",
"cx16",
"evex512",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fxsr",
"idivq_to_divl",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"nopl",
"popcnt",
"prefer_256_bit",
"sahf",
"slow_3ops_lea",
"vzeroupper",
"x87",
"xsave",
},
.yonah = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.znver1 = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clzero",
"cmov",
"cx16",
"f16c",
"fast_15bytenop",
"fast_bextr",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"slow_shld",
"smap",
"smep",
"sse4a",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.znver2 = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clwb",
"clzero",
"cmov",
"cx16",
"f16c",
"fast_15bytenop",
"fast_bextr",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"slow_shld",
"smap",
"smep",
"sse4a",
"vzeroupper",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.znver3 = .{
"64bit",
"adx",
"allow_light_256_bit",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clwb",
"clzero",
"cmov",
"cx16",
"f16c",
"fast_15bytenop",
"fast_bextr",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fsrm",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pku",
"popcnt",
"prfchw",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"slow_shld",
"smap",
"smep",
"sse4a",
"vaes",
"vpclmulqdq",
"vzeroupper",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.znver4 = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vpopcntdq",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clwb",
"clzero",
"cmov",
"cx16",
"evex512",
"fast_15bytenop",
"fast_bextr",
"fast_dpwssd",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pku",
"popcnt",
"prfchw",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"shstk",
"slow_shld",
"smap",
"smep",
"sse4a",
"vaes",
"vpclmulqdq",
"vzeroupper",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.znver5 = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vp2intersect",
"avx512vpopcntdq",
"avxvnni",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clwb",
"clzero",
"cmov",
"cx16",
"evex512",
"fast_15bytenop",
"fast_bextr",
"fast_dpwssd",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"mwaitx",
"nopl",
"pku",
"popcnt",
"prefetchi",
"prfchw",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"shstk",
"slow_shld",
"smap",
"smep",
"sse4a",
"vaes",
"vpclmulqdq",
"vzeroupper",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
},
.x86_64 = .{
.alderlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.amdfam10 = .{
"3dnowa",
"64bit",
"cmov",
"cx16",
"fast_scalar_shift_masks",
"fxsr",
"idivq_to_divl",
"lzcnt",
"nopl",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"sse4a",
"vzeroupper",
"x87",
},
.arrowlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.arrowlake_s = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint16",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"sha512",
"shstk",
"slow_3ops_lea",
"sm3",
"sm4",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.athlon = .{
"3dnowa",
"cmov",
"cx8",
"nopl",
"prfchw",
"slow_shld",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.athlon64 = .{
"3dnowa",
"64bit",
"cmov",
"cx8",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.athlon64_sse3 = .{
"3dnowa",
"64bit",
"cmov",
"cx16",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.athlon_4 = .{
"3dnowa",
"cmov",
"cx8",
"fxsr",
"nopl",
"prfchw",
"slow_shld",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.athlon_fx = .{
"3dnowa",
"64bit",
"cmov",
"cx8",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.athlon_mp = .{
"3dnowa",
"cmov",
"cx8",
"fxsr",
"nopl",
"prfchw",
"slow_shld",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.athlon_tbird = .{
"3dnowa",
"cmov",
"cx8",
"nopl",
"prfchw",
"slow_shld",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.athlon_xp = .{
"3dnowa",
"cmov",
"cx8",
"fxsr",
"nopl",
"prfchw",
"slow_shld",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.atom = .{
"64bit",
"cmov",
"cx16",
"fast_imm16",
"fxsr",
"idivl_to_divb",
"idivq_to_divl",
"lea_sp",
"lea_uses_ag",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pad_short_functions",
"sahf",
"slow_two_mem_ops",
"slow_unaligned_mem_16",
"ssse3",
"vzeroupper",
"x87",
},
.atom_sse4_2_movbe = .{
"64bit",
"aes",
"clflushopt",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_7bytenop",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"sha",
"slow_incdec",
"slow_lea",
"slow_pmulld",
"slow_two_mem_ops",
"sse4_2",
"use_slm_arith_costs",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.barcelona = .{
"3dnowa",
"64bit",
"cmov",
"cx16",
"fast_scalar_shift_masks",
"fxsr",
"idivq_to_divl",
"lzcnt",
"nopl",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"smap",
"smep",
"sse4a",
"vzeroupper",
"x87",
},
.bdver1 = .{
"64bit",
"aes",
"branchfusion",
"cmov",
"cx16",
"fast_11bytenop",
"fast_scalar_shift_masks",
"fxsr",
"idivq_to_divl",
"lwp",
"lzcnt",
"mmx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"vzeroupper",
"x87",
"xop",
"xsave",
},
.bdver2 = .{
"64bit",
"aes",
"bmi",
"branchfusion",
"cmov",
"cx16",
"f16c",
"fast_11bytenop",
"fast_bextr",
"fast_movbe",
"fast_scalar_shift_masks",
"fma",
"fxsr",
"idivq_to_divl",
"lwp",
"lzcnt",
"mmx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"tbm",
"vzeroupper",
"x87",
"xop",
"xsave",
},
.bdver3 = .{
"64bit",
"aes",
"bmi",
"branchfusion",
"cmov",
"cx16",
"f16c",
"fast_11bytenop",
"fast_bextr",
"fast_movbe",
"fast_scalar_shift_masks",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lwp",
"lzcnt",
"mmx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"tbm",
"vzeroupper",
"x87",
"xop",
"xsaveopt",
},
.bdver4 = .{
"64bit",
"aes",
"avx2",
"bmi",
"bmi2",
"branchfusion",
"cmov",
"cx16",
"f16c",
"fast_11bytenop",
"fast_bextr",
"fast_movbe",
"fast_scalar_shift_masks",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lwp",
"lzcnt",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"tbm",
"vzeroupper",
"x87",
"xop",
"xsaveopt",
},
.bonnell = .{
"64bit",
"cmov",
"cx16",
"fast_imm16",
"fxsr",
"idivl_to_divb",
"idivq_to_divl",
"lea_sp",
"lea_uses_ag",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pad_short_functions",
"sahf",
"slow_two_mem_ops",
"slow_unaligned_mem_16",
"ssse3",
"vzeroupper",
"x87",
},
.broadwell = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"cmov",
"cx16",
"ermsb",
"f16c",
"false_deps_lzcnt_tzcnt",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"smap",
"smep",
"vzeroupper",
"x87",
"xsaveopt",
},
.btver1 = .{
"64bit",
"cmov",
"cx16",
"fast_15bytenop",
"fast_imm16",
"fast_scalar_shift_masks",
"fast_vector_shift_masks",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"nopl",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"sse4a",
"ssse3",
"vzeroupper",
"x87",
},
.btver2 = .{
"64bit",
"aes",
"bmi",
"cmov",
"cx16",
"f16c",
"fast_15bytenop",
"fast_bextr",
"fast_hops",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_shift_masks",
"fast_vector_shift_masks",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"movbe",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"sahf",
"sbb_dep_breaking",
"slow_shld",
"sse4a",
"x87",
"xsaveopt",
},
.c3 = .{
"3dnow",
"prfchw",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.c3_2 = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.cannonlake = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vl",
"bmi",
"bmi2",
"clflushopt",
"cmov",
"cx16",
"ermsb",
"evex512",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"sha",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.cascadelake = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512vl",
"avx512vnni",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"faster_shift_than_shuffle",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.clearwaterforest = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint16",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prefetchi",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"sha512",
"shstk",
"slow_3ops_lea",
"sm3",
"sm4",
"tuning_fast_imm_vector_shift",
"uintr",
"usermsr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.cooperlake = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx512bf16",
"avx512cd",
"avx512dq",
"avx512vl",
"avx512vnni",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"faster_shift_than_shuffle",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"tuning_fast_imm_vector_shift",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.core2 = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"macrofusion",
"mmx",
"nopl",
"sahf",
"slow_unaligned_mem_16",
"ssse3",
"vzeroupper",
"x87",
},
.corei7 = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"no_bypass_delay_mov",
"nopl",
"popcnt",
"sahf",
"sse4_2",
"vzeroupper",
"x87",
},
.emeraldrapids = .{
"64bit",
"adx",
"allow_light_256_bit",
"amx_bf16",
"amx_int8",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512fp16",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vnni",
"avx512vpopcntdq",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"enqcmd",
"ermsb",
"evex512",
"false_deps_getmant",
"false_deps_mulc",
"false_deps_mullq",
"false_deps_perm",
"false_deps_range",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"smap",
"smep",
"tsxldtrk",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.generic = .{
"64bit",
"cx8",
"fast_15bytenop",
"fast_scalar_fsqrt",
"idivq_to_divl",
"macrofusion",
"slow_3ops_lea",
"vzeroupper",
"x87",
},
.geode = .{
"3dnowa",
"cx8",
"prfchw",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.goldmont = .{
"64bit",
"aes",
"clflushopt",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"sha",
"slow_incdec",
"slow_lea",
"slow_two_mem_ops",
"smap",
"smep",
"sse4_2",
"use_glm_div_sqrt_costs",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.goldmont_plus = .{
"64bit",
"aes",
"clflushopt",
"cmov",
"cx16",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"slow_incdec",
"slow_lea",
"slow_two_mem_ops",
"sse4_2",
"use_glm_div_sqrt_costs",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.gracemont = .{
"64bit",
"adx",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"f16c",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"nopl",
"pconfig",
"pku",
"popcnt",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.grandridge = .{
"64bit",
"adx",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"nopl",
"pconfig",
"pku",
"popcnt",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.graniterapids = .{
"64bit",
"adx",
"allow_light_256_bit",
"amx_bf16",
"amx_fp16",
"amx_int8",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512fp16",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vnni",
"avx512vpopcntdq",
"avxvnni",
"bmi",
"bmi2",
"branch_hint",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"enqcmd",
"ermsb",
"evex512",
"false_deps_getmant",
"false_deps_mulc",
"false_deps_mullq",
"false_deps_perm",
"false_deps_range",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_256_bit",
"prefetchi",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"tsxldtrk",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.graniterapids_d = .{
"64bit",
"adx",
"allow_light_256_bit",
"amx_bf16",
"amx_complex",
"amx_fp16",
"amx_int8",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512fp16",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vnni",
"avx512vpopcntdq",
"avxvnni",
"bmi",
"bmi2",
"branch_hint",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"enqcmd",
"ermsb",
"evex512",
"false_deps_getmant",
"false_deps_mulc",
"false_deps_mullq",
"false_deps_perm",
"false_deps_range",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_256_bit",
"prefetchi",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"tsxldtrk",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.haswell = .{
"64bit",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"cmov",
"cx16",
"ermsb",
"f16c",
"false_deps_lzcnt_tzcnt",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"popcnt",
"rdrnd",
"sahf",
"slow_3ops_lea",
"smep",
"vzeroupper",
"x87",
"xsaveopt",
},
.i386 = .{
"bsf_bsr_0_clobbers_result",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.i486 = .{
"bsf_bsr_0_clobbers_result",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.i586 = .{
"cx8",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.i686 = .{
"cmov",
"cx8",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.icelake_client = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vpopcntdq",
"bmi",
"bmi2",
"clflushopt",
"cmov",
"cx16",
"ermsb",
"evex512",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.icelake_server = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vpopcntdq",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.ivybridge = .{
"64bit",
"cmov",
"cx16",
"f16c",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"no_bypass_delay_mov",
"nopl",
"pclmul",
"popcnt",
"rdrnd",
"sahf",
"slow_3ops_lea",
"slow_unaligned_mem_32",
"smep",
"vzeroupper",
"x87",
"xsaveopt",
},
.k6 = .{
"cx8",
"mmx",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.k6_2 = .{
"3dnow",
"cx8",
"prfchw",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.k6_3 = .{
"3dnow",
"cx8",
"prfchw",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.k8 = .{
"3dnowa",
"64bit",
"cmov",
"cx8",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.k8_sse3 = .{
"3dnowa",
"64bit",
"cmov",
"cx16",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.knl = .{
"64bit",
"adx",
"aes",
"avx512cd",
"avx512er",
"avx512pf",
"bmi",
"bmi2",
"cmov",
"cx16",
"evex512",
"fast_gather",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"movbe",
"nopl",
"pclmul",
"popcnt",
"prefer_mask_registers",
"prefetchwt1",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"slow_incdec",
"slow_pmaddwd",
"slow_two_mem_ops",
"x87",
"xsaveopt",
},
.knm = .{
"64bit",
"adx",
"aes",
"avx512cd",
"avx512er",
"avx512pf",
"avx512vpopcntdq",
"bmi",
"bmi2",
"cmov",
"cx16",
"evex512",
"fast_gather",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"movbe",
"nopl",
"pclmul",
"popcnt",
"prefer_mask_registers",
"prefetchwt1",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"slow_incdec",
"slow_pmaddwd",
"slow_two_mem_ops",
"x87",
"xsaveopt",
},
.lakemont = .{
"cx8",
"slow_unaligned_mem_16",
"soft_float",
"vzeroupper",
},
.lunarlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint16",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"sha512",
"shstk",
"slow_3ops_lea",
"sm3",
"sm4",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.meteorlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.nehalem = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"no_bypass_delay_mov",
"nopl",
"popcnt",
"sahf",
"sse4_2",
"vzeroupper",
"x87",
},
.nocona = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.opteron = .{
"3dnowa",
"64bit",
"cmov",
"cx8",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.opteron_sse3 = .{
"3dnowa",
"64bit",
"cmov",
"cx16",
"fast_scalar_shift_masks",
"fxsr",
"nopl",
"prfchw",
"sbb_dep_breaking",
"slow_shld",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.pantherlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint16",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prefetchi",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"sha512",
"shstk",
"slow_3ops_lea",
"sm3",
"sm4",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.penryn = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"macrofusion",
"mmx",
"nopl",
"sahf",
"slow_unaligned_mem_16",
"sse4_1",
"vzeroupper",
"x87",
},
.pentium = .{
"cx8",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.pentium2 = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.pentium3 = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.pentium3m = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse",
"vzeroupper",
"x87",
},
.pentium4 = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.pentium_m = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse2",
"vzeroupper",
"x87",
},
.pentium_mmx = .{
"cx8",
"mmx",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.pentiumpro = .{
"cmov",
"cx8",
"nopl",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.prescott = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.raptorlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"f16c",
"false_deps_perm",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_movmsk_over_vtest",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.rocketlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vpopcntdq",
"bmi",
"bmi2",
"clflushopt",
"cmov",
"cx16",
"ermsb",
"evex512",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.sandybridge = .{
"64bit",
"avx",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"no_bypass_delay_mov",
"nopl",
"pclmul",
"popcnt",
"sahf",
"slow_3ops_lea",
"slow_unaligned_mem_32",
"vzeroupper",
"x87",
"xsaveopt",
},
.sapphirerapids = .{
"64bit",
"adx",
"allow_light_256_bit",
"amx_bf16",
"amx_int8",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512fp16",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vnni",
"avx512vpopcntdq",
"avxvnni",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cx16",
"enqcmd",
"ermsb",
"evex512",
"false_deps_getmant",
"false_deps_mulc",
"false_deps_mullq",
"false_deps_perm",
"false_deps_range",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pconfig",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"smap",
"smep",
"tsxldtrk",
"tuning_fast_imm_vector_shift",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.sierraforest = .{
"64bit",
"adx",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint8",
"bmi",
"bmi2",
"cldemote",
"clflushopt",
"clwb",
"cmov",
"cmpccxadd",
"cx16",
"enqcmd",
"f16c",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"gfni",
"hreset",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"nopl",
"pconfig",
"pku",
"popcnt",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"serialize",
"sha",
"shstk",
"slow_3ops_lea",
"uintr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"widekl",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.silvermont = .{
"64bit",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_7bytenop",
"fast_imm16",
"fast_movbe",
"fxsr",
"idivq_to_divl",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"sahf",
"slow_incdec",
"slow_lea",
"slow_pmulld",
"slow_two_mem_ops",
"smep",
"sse4_2",
"use_slm_arith_costs",
"vzeroupper",
"x87",
},
.skx = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512vl",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"faster_shift_than_shuffle",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.skylake = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"clflushopt",
"cmov",
"cx16",
"ermsb",
"f16c",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"smap",
"smep",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.skylake_avx512 = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512vl",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"faster_shift_than_shuffle",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pclmul",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"slow_3ops_lea",
"tuning_fast_imm_vector_shift",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.slm = .{
"64bit",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_7bytenop",
"fast_imm16",
"fast_movbe",
"fxsr",
"idivq_to_divl",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"sahf",
"slow_incdec",
"slow_lea",
"slow_pmulld",
"slow_two_mem_ops",
"sse4_2",
"use_slm_arith_costs",
"vzeroupper",
"x87",
},
.tigerlake = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vp2intersect",
"avx512vpopcntdq",
"bmi",
"bmi2",
"clflushopt",
"clwb",
"cmov",
"cx16",
"ermsb",
"evex512",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pku",
"popcnt",
"prefer_256_bit",
"prfchw",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"shstk",
"smap",
"smep",
"tuning_fast_imm_vector_shift",
"vaes",
"vpclmulqdq",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.tremont = .{
"64bit",
"aes",
"clflushopt",
"clwb",
"cmov",
"cx16",
"fast_imm16",
"fast_movbe",
"fsgsbase",
"fxsr",
"gfni",
"mmx",
"movbe",
"no_bypass_delay",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"ptwrite",
"rdpid",
"rdrnd",
"rdseed",
"sahf",
"sha",
"slow_incdec",
"slow_lea",
"slow_two_mem_ops",
"sse4_2",
"use_glm_div_sqrt_costs",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.westmere = .{
"64bit",
"cmov",
"cx16",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"no_bypass_delay_mov",
"nopl",
"pclmul",
"popcnt",
"sahf",
"sse4_2",
"vzeroupper",
"x87",
},
.winchip2 = .{
"3dnow",
"prfchw",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.winchip_c6 = .{
"mmx",
"slow_unaligned_mem_16",
"vzeroupper",
"x87",
},
.x86_64 = .{
"64bit",
"cmov",
"cx8",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"nopl",
"slow_3ops_lea",
"slow_incdec",
"sse2",
"vzeroupper",
"x87",
},
.x86_64_v2 = .{
"64bit",
"cmov",
"cx16",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fxsr",
"idivq_to_divl",
"macrofusion",
"mmx",
"nopl",
"popcnt",
"sahf",
"slow_3ops_lea",
"slow_unaligned_mem_32",
"sse4_2",
"vzeroupper",
"x87",
},
.x86_64_v3 = .{
"64bit",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"cmov",
"cx16",
"f16c",
"false_deps_lzcnt_tzcnt",
"false_deps_popcnt",
"fast_15bytenop",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fma",
"fxsr",
"idivq_to_divl",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"nopl",
"popcnt",
"sahf",
"slow_3ops_lea",
"vzeroupper",
"x87",
"xsave",
},
.x86_64_v4 = .{
"64bit",
"allow_light_256_bit",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512vl",
"bmi",
"bmi2",
"cmov",
"cx16",
"evex512",
"false_deps_popcnt",
"fast_15bytenop",
"fast_gather",
"fast_scalar_fsqrt",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fxsr",
"idivq_to_divl",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"nopl",
"popcnt",
"prefer_256_bit",
"sahf",
"slow_3ops_lea",
"vzeroupper",
"x87",
"xsave",
},
.yonah = .{
"cmov",
"cx8",
"fxsr",
"mmx",
"nopl",
"slow_unaligned_mem_16",
"sse3",
"vzeroupper",
"x87",
},
.znver1 = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clzero",
"cmov",
"cx16",
"f16c",
"fast_15bytenop",
"fast_bextr",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"slow_shld",
"smap",
"smep",
"sse4a",
"vzeroupper",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.znver2 = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx2",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clwb",
"clzero",
"cmov",
"cx16",
"f16c",
"fast_15bytenop",
"fast_bextr",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fxsr",
"idivq_to_divl",
"lzcnt",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"slow_shld",
"smap",
"smep",
"sse4a",
"vzeroupper",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.znver3 = .{
"64bit",
"adx",
"allow_light_256_bit",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clwb",
"clzero",
"cmov",
"cx16",
"f16c",
"fast_15bytenop",
"fast_bextr",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fsrm",
"fxsr",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pku",
"popcnt",
"prfchw",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"slow_shld",
"smap",
"smep",
"sse4a",
"vaes",
"vpclmulqdq",
"vzeroupper",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.znver4 = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vpopcntdq",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clwb",
"clzero",
"cmov",
"cx16",
"evex512",
"fast_15bytenop",
"fast_bextr",
"fast_dpwssd",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pku",
"popcnt",
"prfchw",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"shstk",
"slow_shld",
"smap",
"smep",
"sse4a",
"vaes",
"vpclmulqdq",
"vzeroupper",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
.znver5 = .{
"64bit",
"adx",
"allow_light_256_bit",
"avx512bf16",
"avx512bitalg",
"avx512cd",
"avx512dq",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vp2intersect",
"avx512vpopcntdq",
"avxvnni",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clwb",
"clzero",
"cmov",
"cx16",
"evex512",
"fast_15bytenop",
"fast_bextr",
"fast_dpwssd",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"mwaitx",
"nopl",
"pku",
"popcnt",
"prefetchi",
"prfchw",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"shstk",
"slow_shld",
"smap",
"smep",
"sse4a",
"vaes",
"vpclmulqdq",
"vzeroupper",
"wbnoinvd",
"x87",
"xsavec",
"xsaveopt",
"xsaves",
},
},
.xcore = .{
.generic = .{},
.xs1b_generic = .{},
},
.xtensa = .{
.generic = .{},
},
},
.cpu_features = .{
.amdgcn = .{
"16_bit_insts",
"a16",
"add_no_carry_insts",
"agent_scope_fine_grained_remote_memory_atomics",
"allocate1_5xvgprs",
"aperture_regs",
"architected_flat_scratch",
"architected_sgprs",
"atomic_buffer_global_pk_add_f16_insts",
"atomic_buffer_global_pk_add_f16_no_rtn_insts",
"atomic_buffer_pk_add_bf16_inst",
"atomic_csub_no_rtn_insts",
"atomic_ds_pk_add_16_insts",
"atomic_fadd_no_rtn_insts",
"atomic_fadd_rtn_insts",
"atomic_flat_pk_add_16_insts",
"atomic_fmin_fmax_flat_f32",
"atomic_fmin_fmax_flat_f64",
"atomic_fmin_fmax_global_f32",
"atomic_fmin_fmax_global_f64",
"atomic_global_pk_add_bf16_inst",
"auto_waitcnt_before_barrier",
"back_off_barrier",
"ci_insts",
"cumode",
"default_component_broadcast",
"default_component_zero",
"dl_insts",
"dot10_insts",
"dot11_insts",
"dot1_insts",
"dot2_insts",
"dot3_insts",
"dot4_insts",
"dot5_insts",
"dot6_insts",
"dot7_insts",
"dot8_insts",
"dot9_insts",
"dpp",
"dpp8",
"dpp_64bit",
"dpp_src1_sgpr",
"ds128",
"ds_src2_insts",
"extended_image_insts",
"fast_denormal_f32",
"fast_fmaf",
"flat_address_space",
"flat_atomic_fadd_f32_inst",
"flat_buffer_global_fadd_f64_inst",
"flat_for_global",
"flat_global_insts",
"flat_inst_offsets",
"flat_scratch",
"flat_scratch_insts",
"flat_segment_offset_bug",
"fma_mix_insts",
"fmacf64_inst",
"fmaf",
"force_store_sc0_sc1",
"fp64",
"fp8_conversion_insts",
"fp8_insts",
"full_rate_64_ops",
"g16",
"gcn3_encoding",
"gds",
"get_wave_id_inst",
"gfx10",
"gfx10_3_insts",
"gfx10_a_encoding",
"gfx10_b_encoding",
"gfx10_insts",
"gfx11",
"gfx11_insts",
"gfx12",
"gfx12_insts",
"gfx7_gfx8_gfx9_insts",
"gfx8_insts",
"gfx9",
"gfx90a_insts",
"gfx940_insts",
"gfx9_insts",
"gws",
"half_rate_64_ops",
"image_gather4_d16_bug",
"image_insts",
"image_store_d16_bug",
"inst_fwd_prefetch_bug",
"int_clamp_insts",
"inv_2pi_inline_imm",
"kernarg_preload",
"lds_branch_vmem_war_hazard",
"lds_misaligned_bug",
"ldsbankcount16",
"ldsbankcount32",
"load_store_opt",
"localmemorysize32768",
"localmemorysize65536",
"mad_intra_fwd_bug",
"mad_mac_f32_insts",
"mad_mix_insts",
"mai_insts",
"max_hard_clause_length_32",
"max_hard_clause_length_63",
"max_private_element_size_16",
"max_private_element_size_4",
"max_private_element_size_8",
"memory_atomic_fadd_f32_denormal_support",
"mfma_inline_literal_bug",
"mimg_r128",
"movrel",
"msaa_load_dst_sel_bug",
"negative_scratch_offset_bug",
"negative_unaligned_scratch_offset_bug",
"no_data_dep_hazard",
"no_sdst_cmpx",
"nsa_clause_bug",
"nsa_encoding",
"nsa_to_vmem_bug",
"offset_3f_bug",
"packed_fp32_ops",
"packed_tid",
"partial_nsa_encoding",
"pk_fmac_f16_inst",
"precise_memory",
"priv_enabled_trap2_nop_bug",
"promote_alloca",
"prt_strict_null",
"pseudo_scalar_trans",
"r128_a16",
"real_true16",
"required_export_priority",
"requires_cov6",
"restricted_soffset",
"s_memrealtime",
"s_memtime_inst",
"salu_float",
"scalar_atomics",
"scalar_dwordx3_loads",
"scalar_flat_scratch_insts",
"scalar_stores",
"sdwa",
"sdwa_mav",
"sdwa_omod",
"sdwa_out_mods_vopc",
"sdwa_scalar",
"sdwa_sdst",
"sea_islands",
"sgpr_init_bug",
"shader_cycles_hi_lo_registers",
"shader_cycles_register",
"si_scheduler",
"smem_to_vector_write_hazard",
"southern_islands",
"sramecc",
"sramecc_support",
"tgsplit",
"trap_handler",
"trig_reduced_range",
"true16",
"unaligned_access_mode",
"unaligned_buffer_access",
"unaligned_ds_access",
"unaligned_scratch_access",
"unpacked_d16_vmem",
"unsafe_ds_offset_folding",
"user_sgpr_init16_bug",
"valu_trans_use_hazard",
"vcmpx_exec_war_hazard",
"vcmpx_permlane_hazard",
"vgpr_index_mode",
"vgpr_singleuse_hint",
"vmem_to_scalar_write_hazard",
"vmem_write_vgpr_in_order",
"volcanic_islands",
"vop3_literal",
"vop3p",
"vopd",
"vscnt",
"wavefrontsize16",
"wavefrontsize32",
"wavefrontsize64",
"xnack",
"xnack_support",
},
.arc = .{
"norm",
},
.arm = .{
"32bit",
"8msecext",
"aapcs_frame_chain",
"aclass",
"acquire_release",
"aes",
"atomics_32",
"avoid_movs_shop",
"avoid_partial_cpsr",
"bf16",
"big_endian_instructions",
"cde",
"cdecp0",
"cdecp1",
"cdecp2",
"cdecp3",
"cdecp4",
"cdecp5",
"cdecp6",
"cdecp7",
"cheap_predicable_cpsr",
"clrbhb",
"crc",
"crypto",
"d32",
"db",
"dfb",
"disable_postra_scheduler",
"dont_widen_vmovs",
"dotprod",
"dsp",
"execute_only",
"expand_fp_mlx",
"fix_cmse_cve_2021_35465",
"fix_cortex_a57_aes_1742098",
"fp16",
"fp16fml",
"fp64",
"fp_armv8",
"fp_armv8d16",
"fp_armv8d16sp",
"fp_armv8sp",
"fpao",
"fpregs",
"fpregs16",
"fpregs64",
"fullfp16",
"fuse_aes",
"fuse_literals",
"harden_sls_blr",
"harden_sls_nocomdat",
"harden_sls_retbr",
"has_v4t",
"has_v5t",
"has_v5te",
"has_v6",
"has_v6k",
"has_v6m",
"has_v6t2",
"has_v7",
"has_v7clrex",
"has_v8",
"has_v8_1a",
"has_v8_1m_main",
"has_v8_2a",
"has_v8_3a",
"has_v8_4a",
"has_v8_5a",
"has_v8_6a",
"has_v8_7a",
"has_v8_8a",
"has_v8_9a",
"has_v8m",
"has_v8m_main",
"has_v9_1a",
"has_v9_2a",
"has_v9_3a",
"has_v9_4a",
"has_v9_5a",
"has_v9a",
"hwdiv",
"hwdiv_arm",
"i8mm",
"iwmmxt",
"iwmmxt2",
"lob",
"long_calls",
"loop_align",
"mclass",
"mp",
"muxed_units",
"mve",
"mve1beat",
"mve2beat",
"mve4beat",
"mve_fp",
"nacl_trap",
"neon",
"neon_fpmovs",
"neonfp",
"no_branch_predictor",
"no_bti_at_return_twice",
"no_movt",
"no_neg_immediates",
"noarm",
"nonpipelined_vfp",
"pacbti",
"perfmon",
"prefer_ishst",
"prefer_vmovsr",
"prof_unpr",
"ras",
"rclass",
"read_tp_tpidrprw",
"read_tp_tpidruro",
"read_tp_tpidrurw",
"reserve_r9",
"ret_addr_stack",
"sb",
"sha2",
"slow_fp_brcc",
"slow_load_D_subreg",
"slow_odd_reg",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"soft_float",
"splat_vfp_neon",
"strict_align",
"thumb2",
"thumb_mode",
"trustzone",
"use_mipipeliner",
"use_misched",
"v2",
"v2a",
"v3",
"v3m",
"v4",
"v4t",
"v5t",
"v5te",
"v5tej",
"v6",
"v6j",
"v6k",
"v6kz",
"v6m",
"v6sm",
"v6t2",
"v7a",
"v7em",
"v7m",
"v7r",
"v7ve",
"v8_1a",
"v8_1m_main",
"v8_2a",
"v8_3a",
"v8_4a",
"v8_5a",
"v8_6a",
"v8_7a",
"v8_8a",
"v8_9a",
"v8a",
"v8m",
"v8m_main",
"v8r",
"v9_1a",
"v9_2a",
"v9_3a",
"v9_4a",
"v9_5a",
"v9a",
"vfp2",
"vfp2sp",
"vfp3",
"vfp3d16",
"vfp3d16sp",
"vfp3sp",
"vfp4",
"vfp4d16",
"vfp4d16sp",
"vfp4sp",
"virtualization",
"vldn_align",
"vmlx_forwarding",
"vmlx_hazards",
"wide_stride_vfp",
"xscale",
"zcz",
},
.armeb = .{
"32bit",
"8msecext",
"aapcs_frame_chain",
"aclass",
"acquire_release",
"aes",
"atomics_32",
"avoid_movs_shop",
"avoid_partial_cpsr",
"bf16",
"big_endian_instructions",
"cde",
"cdecp0",
"cdecp1",
"cdecp2",
"cdecp3",
"cdecp4",
"cdecp5",
"cdecp6",
"cdecp7",
"cheap_predicable_cpsr",
"clrbhb",
"crc",
"crypto",
"d32",
"db",
"dfb",
"disable_postra_scheduler",
"dont_widen_vmovs",
"dotprod",
"dsp",
"execute_only",
"expand_fp_mlx",
"fix_cmse_cve_2021_35465",
"fix_cortex_a57_aes_1742098",
"fp16",
"fp16fml",
"fp64",
"fp_armv8",
"fp_armv8d16",
"fp_armv8d16sp",
"fp_armv8sp",
"fpao",
"fpregs",
"fpregs16",
"fpregs64",
"fullfp16",
"fuse_aes",
"fuse_literals",
"harden_sls_blr",
"harden_sls_nocomdat",
"harden_sls_retbr",
"has_v4t",
"has_v5t",
"has_v5te",
"has_v6",
"has_v6k",
"has_v6m",
"has_v6t2",
"has_v7",
"has_v7clrex",
"has_v8",
"has_v8_1a",
"has_v8_1m_main",
"has_v8_2a",
"has_v8_3a",
"has_v8_4a",
"has_v8_5a",
"has_v8_6a",
"has_v8_7a",
"has_v8_8a",
"has_v8_9a",
"has_v8m",
"has_v8m_main",
"has_v9_1a",
"has_v9_2a",
"has_v9_3a",
"has_v9_4a",
"has_v9_5a",
"has_v9a",
"hwdiv",
"hwdiv_arm",
"i8mm",
"iwmmxt",
"iwmmxt2",
"lob",
"long_calls",
"loop_align",
"mclass",
"mp",
"muxed_units",
"mve",
"mve1beat",
"mve2beat",
"mve4beat",
"mve_fp",
"nacl_trap",
"neon",
"neon_fpmovs",
"neonfp",
"no_branch_predictor",
"no_bti_at_return_twice",
"no_movt",
"no_neg_immediates",
"noarm",
"nonpipelined_vfp",
"pacbti",
"perfmon",
"prefer_ishst",
"prefer_vmovsr",
"prof_unpr",
"ras",
"rclass",
"read_tp_tpidrprw",
"read_tp_tpidruro",
"read_tp_tpidrurw",
"reserve_r9",
"ret_addr_stack",
"sb",
"sha2",
"slow_fp_brcc",
"slow_load_D_subreg",
"slow_odd_reg",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"soft_float",
"splat_vfp_neon",
"strict_align",
"thumb2",
"thumb_mode",
"trustzone",
"use_mipipeliner",
"use_misched",
"v2",
"v2a",
"v3",
"v3m",
"v4",
"v4t",
"v5t",
"v5te",
"v5tej",
"v6",
"v6j",
"v6k",
"v6kz",
"v6m",
"v6sm",
"v6t2",
"v7a",
"v7em",
"v7m",
"v7r",
"v7ve",
"v8_1a",
"v8_1m_main",
"v8_2a",
"v8_3a",
"v8_4a",
"v8_5a",
"v8_6a",
"v8_7a",
"v8_8a",
"v8_9a",
"v8a",
"v8m",
"v8m_main",
"v8r",
"v9_1a",
"v9_2a",
"v9_3a",
"v9_4a",
"v9_5a",
"v9a",
"vfp2",
"vfp2sp",
"vfp3",
"vfp3d16",
"vfp3d16sp",
"vfp3sp",
"vfp4",
"vfp4d16",
"vfp4d16sp",
"vfp4sp",
"virtualization",
"vldn_align",
"vmlx_forwarding",
"vmlx_hazards",
"wide_stride_vfp",
"xscale",
"zcz",
},
.thumb = .{
"32bit",
"8msecext",
"aapcs_frame_chain",
"aclass",
"acquire_release",
"aes",
"atomics_32",
"avoid_movs_shop",
"avoid_partial_cpsr",
"bf16",
"big_endian_instructions",
"cde",
"cdecp0",
"cdecp1",
"cdecp2",
"cdecp3",
"cdecp4",
"cdecp5",
"cdecp6",
"cdecp7",
"cheap_predicable_cpsr",
"clrbhb",
"crc",
"crypto",
"d32",
"db",
"dfb",
"disable_postra_scheduler",
"dont_widen_vmovs",
"dotprod",
"dsp",
"execute_only",
"expand_fp_mlx",
"fix_cmse_cve_2021_35465",
"fix_cortex_a57_aes_1742098",
"fp16",
"fp16fml",
"fp64",
"fp_armv8",
"fp_armv8d16",
"fp_armv8d16sp",
"fp_armv8sp",
"fpao",
"fpregs",
"fpregs16",
"fpregs64",
"fullfp16",
"fuse_aes",
"fuse_literals",
"harden_sls_blr",
"harden_sls_nocomdat",
"harden_sls_retbr",
"has_v4t",
"has_v5t",
"has_v5te",
"has_v6",
"has_v6k",
"has_v6m",
"has_v6t2",
"has_v7",
"has_v7clrex",
"has_v8",
"has_v8_1a",
"has_v8_1m_main",
"has_v8_2a",
"has_v8_3a",
"has_v8_4a",
"has_v8_5a",
"has_v8_6a",
"has_v8_7a",
"has_v8_8a",
"has_v8_9a",
"has_v8m",
"has_v8m_main",
"has_v9_1a",
"has_v9_2a",
"has_v9_3a",
"has_v9_4a",
"has_v9_5a",
"has_v9a",
"hwdiv",
"hwdiv_arm",
"i8mm",
"iwmmxt",
"iwmmxt2",
"lob",
"long_calls",
"loop_align",
"mclass",
"mp",
"muxed_units",
"mve",
"mve1beat",
"mve2beat",
"mve4beat",
"mve_fp",
"nacl_trap",
"neon",
"neon_fpmovs",
"neonfp",
"no_branch_predictor",
"no_bti_at_return_twice",
"no_movt",
"no_neg_immediates",
"noarm",
"nonpipelined_vfp",
"pacbti",
"perfmon",
"prefer_ishst",
"prefer_vmovsr",
"prof_unpr",
"ras",
"rclass",
"read_tp_tpidrprw",
"read_tp_tpidruro",
"read_tp_tpidrurw",
"reserve_r9",
"ret_addr_stack",
"sb",
"sha2",
"slow_fp_brcc",
"slow_load_D_subreg",
"slow_odd_reg",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"soft_float",
"splat_vfp_neon",
"strict_align",
"thumb2",
"thumb_mode",
"trustzone",
"use_mipipeliner",
"use_misched",
"v2",
"v2a",
"v3",
"v3m",
"v4",
"v4t",
"v5t",
"v5te",
"v5tej",
"v6",
"v6j",
"v6k",
"v6kz",
"v6m",
"v6sm",
"v6t2",
"v7a",
"v7em",
"v7m",
"v7r",
"v7ve",
"v8_1a",
"v8_1m_main",
"v8_2a",
"v8_3a",
"v8_4a",
"v8_5a",
"v8_6a",
"v8_7a",
"v8_8a",
"v8_9a",
"v8a",
"v8m",
"v8m_main",
"v8r",
"v9_1a",
"v9_2a",
"v9_3a",
"v9_4a",
"v9_5a",
"v9a",
"vfp2",
"vfp2sp",
"vfp3",
"vfp3d16",
"vfp3d16sp",
"vfp3sp",
"vfp4",
"vfp4d16",
"vfp4d16sp",
"vfp4sp",
"virtualization",
"vldn_align",
"vmlx_forwarding",
"vmlx_hazards",
"wide_stride_vfp",
"xscale",
"zcz",
},
.thumbeb = .{
"32bit",
"8msecext",
"aapcs_frame_chain",
"aclass",
"acquire_release",
"aes",
"atomics_32",
"avoid_movs_shop",
"avoid_partial_cpsr",
"bf16",
"big_endian_instructions",
"cde",
"cdecp0",
"cdecp1",
"cdecp2",
"cdecp3",
"cdecp4",
"cdecp5",
"cdecp6",
"cdecp7",
"cheap_predicable_cpsr",
"clrbhb",
"crc",
"crypto",
"d32",
"db",
"dfb",
"disable_postra_scheduler",
"dont_widen_vmovs",
"dotprod",
"dsp",
"execute_only",
"expand_fp_mlx",
"fix_cmse_cve_2021_35465",
"fix_cortex_a57_aes_1742098",
"fp16",
"fp16fml",
"fp64",
"fp_armv8",
"fp_armv8d16",
"fp_armv8d16sp",
"fp_armv8sp",
"fpao",
"fpregs",
"fpregs16",
"fpregs64",
"fullfp16",
"fuse_aes",
"fuse_literals",
"harden_sls_blr",
"harden_sls_nocomdat",
"harden_sls_retbr",
"has_v4t",
"has_v5t",
"has_v5te",
"has_v6",
"has_v6k",
"has_v6m",
"has_v6t2",
"has_v7",
"has_v7clrex",
"has_v8",
"has_v8_1a",
"has_v8_1m_main",
"has_v8_2a",
"has_v8_3a",
"has_v8_4a",
"has_v8_5a",
"has_v8_6a",
"has_v8_7a",
"has_v8_8a",
"has_v8_9a",
"has_v8m",
"has_v8m_main",
"has_v9_1a",
"has_v9_2a",
"has_v9_3a",
"has_v9_4a",
"has_v9_5a",
"has_v9a",
"hwdiv",
"hwdiv_arm",
"i8mm",
"iwmmxt",
"iwmmxt2",
"lob",
"long_calls",
"loop_align",
"mclass",
"mp",
"muxed_units",
"mve",
"mve1beat",
"mve2beat",
"mve4beat",
"mve_fp",
"nacl_trap",
"neon",
"neon_fpmovs",
"neonfp",
"no_branch_predictor",
"no_bti_at_return_twice",
"no_movt",
"no_neg_immediates",
"noarm",
"nonpipelined_vfp",
"pacbti",
"perfmon",
"prefer_ishst",
"prefer_vmovsr",
"prof_unpr",
"ras",
"rclass",
"read_tp_tpidrprw",
"read_tp_tpidruro",
"read_tp_tpidrurw",
"reserve_r9",
"ret_addr_stack",
"sb",
"sha2",
"slow_fp_brcc",
"slow_load_D_subreg",
"slow_odd_reg",
"slow_vdup32",
"slow_vgetlni32",
"slowfpvfmx",
"slowfpvmlx",
"soft_float",
"splat_vfp_neon",
"strict_align",
"thumb2",
"thumb_mode",
"trustzone",
"use_mipipeliner",
"use_misched",
"v2",
"v2a",
"v3",
"v3m",
"v4",
"v4t",
"v5t",
"v5te",
"v5tej",
"v6",
"v6j",
"v6k",
"v6kz",
"v6m",
"v6sm",
"v6t2",
"v7a",
"v7em",
"v7m",
"v7r",
"v7ve",
"v8_1a",
"v8_1m_main",
"v8_2a",
"v8_3a",
"v8_4a",
"v8_5a",
"v8_6a",
"v8_7a",
"v8_8a",
"v8_9a",
"v8a",
"v8m",
"v8m_main",
"v8r",
"v9_1a",
"v9_2a",
"v9_3a",
"v9_4a",
"v9_5a",
"v9a",
"vfp2",
"vfp2sp",
"vfp3",
"vfp3d16",
"vfp3d16sp",
"vfp3sp",
"vfp4",
"vfp4d16",
"vfp4d16sp",
"vfp4sp",
"virtualization",
"vldn_align",
"vmlx_forwarding",
"vmlx_hazards",
"wide_stride_vfp",
"xscale",
"zcz",
},
.aarch64 = .{
"addr_lsl_slow_14",
"aes",
"aggressive_fma",
"alternate_sextload_cvt_f32_pattern",
"altnzcv",
"alu_lsl_fast",
"am",
"amvs",
"arith_bcc_fusion",
"arith_cbz_fusion",
"ascend_store_address",
"b16b16",
"balance_fp_ops",
"bf16",
"brbe",
"bti",
"call_saved_x10",
"call_saved_x11",
"call_saved_x12",
"call_saved_x13",
"call_saved_x14",
"call_saved_x15",
"call_saved_x18",
"call_saved_x8",
"call_saved_x9",
"ccdp",
"ccidx",
"ccpp",
"chk",
"clrbhb",
"cmp_bcc_fusion",
"complxnum",
"contextidr_el2",
"cpa",
"crc",
"crypto",
"cssc",
"d128",
"disable_latency_sched_heuristic",
"disable_ldp",
"disable_stp",
"dit",
"dotprod",
"ecv",
"el2vmsa",
"el3",
"enable_select_opt",
"ete",
"exynos_cheap_as_move",
"f32mm",
"f64mm",
"faminmax",
"fgt",
"fix_cortex_a53_835769",
"flagm",
"fmv",
"force_32bit_jump_tables",
"fp16fml",
"fp8",
"fp8dot2",
"fp8dot4",
"fp8fma",
"fp_armv8",
"fpac",
"fptoint",
"fullfp16",
"fuse_address",
"fuse_addsub_2reg_const1",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"gcs",
"harden_sls_blr",
"harden_sls_nocomdat",
"harden_sls_retbr",
"hbc",
"hcx",
"i8mm",
"ite",
"jsconv",
"ldp_aligned_only",
"lor",
"ls64",
"lse",
"lse128",
"lse2",
"lut",
"mec",
"mops",
"mpam",
"mte",
"neon",
"nmi",
"no_bti_at_return_twice",
"no_neg_immediates",
"no_sve_fp_ld1r",
"no_zcz_fp",
"nv",
"outline_atomics",
"pan",
"pan_rwv",
"pauth",
"pauth_lr",
"perfmon",
"predictable_select_expensive",
"predres",
"prfm_slc_target",
"rand",
"ras",
"rasv2",
"rcpc",
"rcpc3",
"rcpc_immo",
"rdm",
"reserve_lr_for_ra",
"reserve_x1",
"reserve_x10",
"reserve_x11",
"reserve_x12",
"reserve_x13",
"reserve_x14",
"reserve_x15",
"reserve_x18",
"reserve_x2",
"reserve_x20",
"reserve_x21",
"reserve_x22",
"reserve_x23",
"reserve_x24",
"reserve_x25",
"reserve_x26",
"reserve_x27",
"reserve_x28",
"reserve_x3",
"reserve_x4",
"reserve_x5",
"reserve_x6",
"reserve_x7",
"reserve_x9",
"rme",
"sb",
"sel2",
"sha2",
"sha3",
"slow_misaligned_128store",
"slow_paired_128",
"slow_strqro_store",
"sm4",
"sme",
"sme2",
"sme2p1",
"sme_b16b16",
"sme_f16f16",
"sme_f64f64",
"sme_f8f16",
"sme_f8f32",
"sme_fa64",
"sme_i16i64",
"sme_lutv2",
"spe",
"spe_eef",
"specres2",
"specrestrict",
"ssbs",
"ssve_fp8dot2",
"ssve_fp8dot4",
"ssve_fp8fma",
"store_pair_suppress",
"stp_aligned_only",
"strict_align",
"sve",
"sve2",
"sve2_aes",
"sve2_bitperm",
"sve2_sha3",
"sve2_sm4",
"sve2p1",
"sve_b16b16",
"tagged_globals",
"the",
"tlb_rmi",
"tlbiw",
"tme",
"tpidr_el1",
"tpidr_el2",
"tpidr_el3",
"tpidrro_el0",
"tracev8_4",
"trbe",
"uaops",
"use_experimental_zeroing_pseudos",
"use_fixed_over_scalable_if_equal_cost",
"use_postra_scheduler",
"use_reciprocal_square_root",
"use_scalar_inc_vl",
"v8_1a",
"v8_2a",
"v8_3a",
"v8_4a",
"v8_5a",
"v8_6a",
"v8_7a",
"v8_8a",
"v8_9a",
"v8a",
"v8r",
"v9_1a",
"v9_2a",
"v9_3a",
"v9_4a",
"v9_5a",
"v9a",
"vh",
"wfxt",
"xs",
"zcm",
"zcz",
"zcz_fp_workaround",
"zcz_gp",
},
.aarch64_be = .{
"addr_lsl_slow_14",
"aes",
"aggressive_fma",
"alternate_sextload_cvt_f32_pattern",
"altnzcv",
"alu_lsl_fast",
"am",
"amvs",
"arith_bcc_fusion",
"arith_cbz_fusion",
"ascend_store_address",
"b16b16",
"balance_fp_ops",
"bf16",
"brbe",
"bti",
"call_saved_x10",
"call_saved_x11",
"call_saved_x12",
"call_saved_x13",
"call_saved_x14",
"call_saved_x15",
"call_saved_x18",
"call_saved_x8",
"call_saved_x9",
"ccdp",
"ccidx",
"ccpp",
"chk",
"clrbhb",
"cmp_bcc_fusion",
"complxnum",
"contextidr_el2",
"cpa",
"crc",
"crypto",
"cssc",
"d128",
"disable_latency_sched_heuristic",
"disable_ldp",
"disable_stp",
"dit",
"dotprod",
"ecv",
"el2vmsa",
"el3",
"enable_select_opt",
"ete",
"exynos_cheap_as_move",
"f32mm",
"f64mm",
"faminmax",
"fgt",
"fix_cortex_a53_835769",
"flagm",
"fmv",
"force_32bit_jump_tables",
"fp16fml",
"fp8",
"fp8dot2",
"fp8dot4",
"fp8fma",
"fp_armv8",
"fpac",
"fptoint",
"fullfp16",
"fuse_address",
"fuse_addsub_2reg_const1",
"fuse_adrp_add",
"fuse_aes",
"fuse_arith_logic",
"fuse_crypto_eor",
"fuse_csel",
"fuse_literals",
"gcs",
"harden_sls_blr",
"harden_sls_nocomdat",
"harden_sls_retbr",
"hbc",
"hcx",
"i8mm",
"ite",
"jsconv",
"ldp_aligned_only",
"lor",
"ls64",
"lse",
"lse128",
"lse2",
"lut",
"mec",
"mops",
"mpam",
"mte",
"neon",
"nmi",
"no_bti_at_return_twice",
"no_neg_immediates",
"no_sve_fp_ld1r",
"no_zcz_fp",
"nv",
"outline_atomics",
"pan",
"pan_rwv",
"pauth",
"pauth_lr",
"perfmon",
"predictable_select_expensive",
"predres",
"prfm_slc_target",
"rand",
"ras",
"rasv2",
"rcpc",
"rcpc3",
"rcpc_immo",
"rdm",
"reserve_lr_for_ra",
"reserve_x1",
"reserve_x10",
"reserve_x11",
"reserve_x12",
"reserve_x13",
"reserve_x14",
"reserve_x15",
"reserve_x18",
"reserve_x2",
"reserve_x20",
"reserve_x21",
"reserve_x22",
"reserve_x23",
"reserve_x24",
"reserve_x25",
"reserve_x26",
"reserve_x27",
"reserve_x28",
"reserve_x3",
"reserve_x4",
"reserve_x5",
"reserve_x6",
"reserve_x7",
"reserve_x9",
"rme",
"sb",
"sel2",
"sha2",
"sha3",
"slow_misaligned_128store",
"slow_paired_128",
"slow_strqro_store",
"sm4",
"sme",
"sme2",
"sme2p1",
"sme_b16b16",
"sme_f16f16",
"sme_f64f64",
"sme_f8f16",
"sme_f8f32",
"sme_fa64",
"sme_i16i64",
"sme_lutv2",
"spe",
"spe_eef",
"specres2",
"specrestrict",
"ssbs",
"ssve_fp8dot2",
"ssve_fp8dot4",
"ssve_fp8fma",
"store_pair_suppress",
"stp_aligned_only",
"strict_align",
"sve",
"sve2",
"sve2_aes",
"sve2_bitperm",
"sve2_sha3",
"sve2_sm4",
"sve2p1",
"sve_b16b16",
"tagged_globals",
"the",
"tlb_rmi",
"tlbiw",
"tme",
"tpidr_el1",
"tpidr_el2",
"tpidr_el3",
"tpidrro_el0",
"tracev8_4",
"trbe",
"uaops",
"use_experimental_zeroing_pseudos",
"use_fixed_over_scalable_if_equal_cost",
"use_postra_scheduler",
"use_reciprocal_square_root",
"use_scalar_inc_vl",
"v8_1a",
"v8_2a",
"v8_3a",
"v8_4a",
"v8_5a",
"v8_6a",
"v8_7a",
"v8_8a",
"v8_9a",
"v8a",
"v8r",
"v9_1a",
"v9_2a",
"v9_3a",
"v9_4a",
"v9_5a",
"v9a",
"vh",
"wfxt",
"xs",
"zcm",
"zcz",
"zcz_fp_workaround",
"zcz_gp",
},
.avr = .{
"addsubiw",
"avr0",
"avr1",
"avr2",
"avr25",
"avr3",
"avr31",
"avr35",
"avr4",
"avr5",
"avr51",
"avr6",
"avrtiny",
"break",
"des",
"eijmpcall",
"elpm",
"elpmx",
"ijmpcall",
"jmpcall",
"lowbytefirst",
"lpm",
"lpmx",
"memmappedregs",
"movw",
"mul",
"rmw",
"smallstack",
"special",
"spm",
"spmx",
"sram",
"tinyencoding",
"xmega",
"xmega3",
"xmegau",
},
.bpfel = .{
"alu32",
"dummy",
"dwarfris",
},
.bpfeb = .{
"alu32",
"dummy",
"dwarfris",
},
.csky = .{
"10e60",
"2e3",
"3e3r1",
"3e3r2",
"3e3r3",
"3e7",
"7e10",
"btst16",
"cache",
"ccrt",
"ck801",
"ck802",
"ck803",
"ck803s",
"ck804",
"ck805",
"ck807",
"ck810",
"ck810v",
"ck860",
"ck860v",
"constpool",
"doloop",
"dsp1e2",
"dsp_silan",
"dspe60",
"dspv2",
"e1",
"e2",
"edsp",
"elrw",
"fdivdu",
"float1e2",
"float1e3",
"float3e4",
"float7e60",
"floate1",
"fpuv2_df",
"fpuv2_sf",
"fpuv3_df",
"fpuv3_hf",
"fpuv3_hi",
"fpuv3_sf",
"hard_float",
"hard_float_abi",
"hard_tp",
"high_registers",
"hwdiv",
"istack",
"java",
"mp",
"mp1e2",
"multiple_stld",
"nvic",
"pushpop",
"smart",
"soft_tp",
"stack_size",
"trust",
"vdsp2e3",
"vdsp2e60f",
"vdspv1",
"vdspv2",
},
.hexagon = .{
"audio",
"cabac",
"compound",
"duplex",
"hvx",
"hvx_ieee_fp",
"hvx_length128b",
"hvx_length64b",
"hvx_qfloat",
"hvxv60",
"hvxv62",
"hvxv65",
"hvxv66",
"hvxv67",
"hvxv68",
"hvxv69",
"hvxv71",
"hvxv73",
"long_calls",
"mem_noshuf",
"memops",
"noreturn_stack_elim",
"nvj",
"nvs",
"packets",
"prev65",
"reserved_r19",
"small_data",
"tinycore",
"unsafe_fp",
"v5",
"v55",
"v60",
"v62",
"v65",
"v66",
"v67",
"v68",
"v69",
"v71",
"v73",
"zreg",
},
.kalimba = .{},
.lanai = .{},
.loongarch32 = .{
"32bit",
"64bit",
"d",
"f",
"frecipe",
"la_global_with_abs",
"la_global_with_pcrel",
"la_local_with_abs",
"lasx",
"lbt",
"lsx",
"lvz",
"prefer_w_inst",
"relax",
"ual",
},
.loongarch64 = .{
"32bit",
"64bit",
"d",
"f",
"frecipe",
"la_global_with_abs",
"la_global_with_pcrel",
"la_local_with_abs",
"lasx",
"lbt",
"lsx",
"lvz",
"prefer_w_inst",
"relax",
"ual",
},
.m68k = .{
"isa_68000",
"isa_68010",
"isa_68020",
"isa_68030",
"isa_68040",
"isa_68060",
"isa_68881",
"isa_68882",
"reserve_a0",
"reserve_a1",
"reserve_a2",
"reserve_a3",
"reserve_a4",
"reserve_a5",
"reserve_a6",
"reserve_d0",
"reserve_d1",
"reserve_d2",
"reserve_d3",
"reserve_d4",
"reserve_d5",
"reserve_d6",
"reserve_d7",
},
.mips = .{
"abs2008",
"cnmips",
"cnmipsp",
"crc",
"dsp",
"dspr2",
"dspr3",
"eva",
"fp64",
"fpxx",
"ginv",
"gp64",
"long_calls",
"micromips",
"mips1",
"mips16",
"mips2",
"mips3",
"mips32",
"mips32r2",
"mips32r3",
"mips32r5",
"mips32r6",
"mips3_32",
"mips3_32r2",
"mips3d",
"mips4",
"mips4_32",
"mips4_32r2",
"mips5",
"mips5_32r2",
"mips64",
"mips64r2",
"mips64r3",
"mips64r5",
"mips64r6",
"msa",
"mt",
"nan2008",
"noabicalls",
"nomadd4",
"nooddspreg",
"p5600",
"ptr64",
"single_float",
"soft_float",
"strict_align",
"sym32",
"use_indirect_jump_hazard",
"use_tcc_in_div",
"vfpu",
"virt",
"xgot",
},
.mipsel = .{
"abs2008",
"cnmips",
"cnmipsp",
"crc",
"dsp",
"dspr2",
"dspr3",
"eva",
"fp64",
"fpxx",
"ginv",
"gp64",
"long_calls",
"micromips",
"mips1",
"mips16",
"mips2",
"mips3",
"mips32",
"mips32r2",
"mips32r3",
"mips32r5",
"mips32r6",
"mips3_32",
"mips3_32r2",
"mips3d",
"mips4",
"mips4_32",
"mips4_32r2",
"mips5",
"mips5_32r2",
"mips64",
"mips64r2",
"mips64r3",
"mips64r5",
"mips64r6",
"msa",
"mt",
"nan2008",
"noabicalls",
"nomadd4",
"nooddspreg",
"p5600",
"ptr64",
"single_float",
"soft_float",
"strict_align",
"sym32",
"use_indirect_jump_hazard",
"use_tcc_in_div",
"vfpu",
"virt",
"xgot",
},
.mips64 = .{
"abs2008",
"cnmips",
"cnmipsp",
"crc",
"dsp",
"dspr2",
"dspr3",
"eva",
"fp64",
"fpxx",
"ginv",
"gp64",
"long_calls",
"micromips",
"mips1",
"mips16",
"mips2",
"mips3",
"mips32",
"mips32r2",
"mips32r3",
"mips32r5",
"mips32r6",
"mips3_32",
"mips3_32r2",
"mips3d",
"mips4",
"mips4_32",
"mips4_32r2",
"mips5",
"mips5_32r2",
"mips64",
"mips64r2",
"mips64r3",
"mips64r5",
"mips64r6",
"msa",
"mt",
"nan2008",
"noabicalls",
"nomadd4",
"nooddspreg",
"p5600",
"ptr64",
"single_float",
"soft_float",
"strict_align",
"sym32",
"use_indirect_jump_hazard",
"use_tcc_in_div",
"vfpu",
"virt",
"xgot",
},
.mips64el = .{
"abs2008",
"cnmips",
"cnmipsp",
"crc",
"dsp",
"dspr2",
"dspr3",
"eva",
"fp64",
"fpxx",
"ginv",
"gp64",
"long_calls",
"micromips",
"mips1",
"mips16",
"mips2",
"mips3",
"mips32",
"mips32r2",
"mips32r3",
"mips32r5",
"mips32r6",
"mips3_32",
"mips3_32r2",
"mips3d",
"mips4",
"mips4_32",
"mips4_32r2",
"mips5",
"mips5_32r2",
"mips64",
"mips64r2",
"mips64r3",
"mips64r5",
"mips64r6",
"msa",
"mt",
"nan2008",
"noabicalls",
"nomadd4",
"nooddspreg",
"p5600",
"ptr64",
"single_float",
"soft_float",
"strict_align",
"sym32",
"use_indirect_jump_hazard",
"use_tcc_in_div",
"vfpu",
"virt",
"xgot",
},
.msp430 = .{
"ext",
"hwmult16",
"hwmult32",
"hwmultf5",
},
.nvptx = .{
"ptx32",
"ptx40",
"ptx41",
"ptx42",
"ptx43",
"ptx50",
"ptx60",
"ptx61",
"ptx62",
"ptx63",
"ptx64",
"ptx65",
"ptx70",
"ptx71",
"ptx72",
"ptx73",
"ptx74",
"ptx75",
"ptx76",
"ptx77",
"ptx78",
"ptx80",
"ptx81",
"ptx82",
"ptx83",
"ptx84",
"ptx85",
"sm_20",
"sm_21",
"sm_30",
"sm_32",
"sm_35",
"sm_37",
"sm_50",
"sm_52",
"sm_53",
"sm_60",
"sm_61",
"sm_62",
"sm_70",
"sm_72",
"sm_75",
"sm_80",
"sm_86",
"sm_87",
"sm_89",
"sm_90",
"sm_90a",
},
.nvptx64 = .{
"ptx32",
"ptx40",
"ptx41",
"ptx42",
"ptx43",
"ptx50",
"ptx60",
"ptx61",
"ptx62",
"ptx63",
"ptx64",
"ptx65",
"ptx70",
"ptx71",
"ptx72",
"ptx73",
"ptx74",
"ptx75",
"ptx76",
"ptx77",
"ptx78",
"ptx80",
"ptx81",
"ptx82",
"ptx83",
"ptx84",
"ptx85",
"sm_20",
"sm_21",
"sm_30",
"sm_32",
"sm_35",
"sm_37",
"sm_50",
"sm_52",
"sm_53",
"sm_60",
"sm_61",
"sm_62",
"sm_70",
"sm_72",
"sm_75",
"sm_80",
"sm_86",
"sm_87",
"sm_89",
"sm_90",
"sm_90a",
},
.powerpc = .{
"64bit",
"64bitregs",
"aix",
"aix_shared_lib_tls_model_opt",
"aix_small_local_dynamic_tls",
"aix_small_local_exec_tls",
"allow_unaligned_fp_access",
"altivec",
"booke",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"e500",
"efpu2",
"extdiv",
"fast_MFLR",
"fcpsgn",
"float128",
"fpcvt",
"fprnd",
"fpu",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_addi_load",
"fuse_addis_load",
"fuse_arith_add",
"fuse_back2back",
"fuse_cmp",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"fuse_wideimm",
"fuse_zeromove",
"fusion",
"hard_float",
"htm",
"icbt",
"invariant_function_descriptors",
"isa_future_instructions",
"isa_v206_instructions",
"isa_v207_instructions",
"isa_v30_instructions",
"isa_v31_instructions",
"isel",
"ldbrx",
"lfiwax",
"longcall",
"mfocrf",
"mma",
"modern_aix_as",
"msync",
"paired_vector_memops",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"power8_altivec",
"power8_vector",
"power9_altivec",
"power9_vector",
"ppc4xx",
"ppc6xx",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"prefix_instrs",
"privileged",
"quadword_atomics",
"recipprec",
"rop_protect",
"secure_plt",
"slow_popcntd",
"spe",
"stfiwx",
"two_const_nr",
"vectors_use_two_units",
"vsx",
},
.powerpcle = .{
"64bit",
"64bitregs",
"aix",
"aix_shared_lib_tls_model_opt",
"aix_small_local_dynamic_tls",
"aix_small_local_exec_tls",
"allow_unaligned_fp_access",
"altivec",
"booke",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"e500",
"efpu2",
"extdiv",
"fast_MFLR",
"fcpsgn",
"float128",
"fpcvt",
"fprnd",
"fpu",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_addi_load",
"fuse_addis_load",
"fuse_arith_add",
"fuse_back2back",
"fuse_cmp",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"fuse_wideimm",
"fuse_zeromove",
"fusion",
"hard_float",
"htm",
"icbt",
"invariant_function_descriptors",
"isa_future_instructions",
"isa_v206_instructions",
"isa_v207_instructions",
"isa_v30_instructions",
"isa_v31_instructions",
"isel",
"ldbrx",
"lfiwax",
"longcall",
"mfocrf",
"mma",
"modern_aix_as",
"msync",
"paired_vector_memops",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"power8_altivec",
"power8_vector",
"power9_altivec",
"power9_vector",
"ppc4xx",
"ppc6xx",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"prefix_instrs",
"privileged",
"quadword_atomics",
"recipprec",
"rop_protect",
"secure_plt",
"slow_popcntd",
"spe",
"stfiwx",
"two_const_nr",
"vectors_use_two_units",
"vsx",
},
.powerpc64 = .{
"64bit",
"64bitregs",
"aix",
"aix_shared_lib_tls_model_opt",
"aix_small_local_dynamic_tls",
"aix_small_local_exec_tls",
"allow_unaligned_fp_access",
"altivec",
"booke",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"e500",
"efpu2",
"extdiv",
"fast_MFLR",
"fcpsgn",
"float128",
"fpcvt",
"fprnd",
"fpu",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_addi_load",
"fuse_addis_load",
"fuse_arith_add",
"fuse_back2back",
"fuse_cmp",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"fuse_wideimm",
"fuse_zeromove",
"fusion",
"hard_float",
"htm",
"icbt",
"invariant_function_descriptors",
"isa_future_instructions",
"isa_v206_instructions",
"isa_v207_instructions",
"isa_v30_instructions",
"isa_v31_instructions",
"isel",
"ldbrx",
"lfiwax",
"longcall",
"mfocrf",
"mma",
"modern_aix_as",
"msync",
"paired_vector_memops",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"power8_altivec",
"power8_vector",
"power9_altivec",
"power9_vector",
"ppc4xx",
"ppc6xx",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"prefix_instrs",
"privileged",
"quadword_atomics",
"recipprec",
"rop_protect",
"secure_plt",
"slow_popcntd",
"spe",
"stfiwx",
"two_const_nr",
"vectors_use_two_units",
"vsx",
},
.powerpc64le = .{
"64bit",
"64bitregs",
"aix",
"aix_shared_lib_tls_model_opt",
"aix_small_local_dynamic_tls",
"aix_small_local_exec_tls",
"allow_unaligned_fp_access",
"altivec",
"booke",
"bpermd",
"cmpb",
"crbits",
"crypto",
"direct_move",
"e500",
"efpu2",
"extdiv",
"fast_MFLR",
"fcpsgn",
"float128",
"fpcvt",
"fprnd",
"fpu",
"fre",
"fres",
"frsqrte",
"frsqrtes",
"fsqrt",
"fuse_add_logical",
"fuse_addi_load",
"fuse_addis_load",
"fuse_arith_add",
"fuse_back2back",
"fuse_cmp",
"fuse_logical",
"fuse_logical_add",
"fuse_sha3",
"fuse_store",
"fuse_wideimm",
"fuse_zeromove",
"fusion",
"hard_float",
"htm",
"icbt",
"invariant_function_descriptors",
"isa_future_instructions",
"isa_v206_instructions",
"isa_v207_instructions",
"isa_v30_instructions",
"isa_v31_instructions",
"isel",
"ldbrx",
"lfiwax",
"longcall",
"mfocrf",
"mma",
"modern_aix_as",
"msync",
"paired_vector_memops",
"partword_atomics",
"pcrelative_memops",
"popcntd",
"power10_vector",
"power8_altivec",
"power8_vector",
"power9_altivec",
"power9_vector",
"ppc4xx",
"ppc6xx",
"ppc_postra_sched",
"ppc_prera_sched",
"predictable_select_expensive",
"prefix_instrs",
"privileged",
"quadword_atomics",
"recipprec",
"rop_protect",
"secure_plt",
"slow_popcntd",
"spe",
"stfiwx",
"two_const_nr",
"vectors_use_two_units",
"vsx",
},
.propeller = .{},
.riscv32 = .{
"32bit",
"64bit",
"a",
"auipc_addi_fusion",
"b",
"c",
"conditional_cmv_fusion",
"d",
"dlen_factor_2",
"e",
"experimental",
"experimental_rva23s64",
"experimental_rva23u64",
"experimental_rvb23s64",
"experimental_rvb23u64",
"experimental_rvm23u32",
"experimental_smmpm",
"experimental_smnpm",
"experimental_ssnpm",
"experimental_sspm",
"experimental_ssqosid",
"experimental_supm",
"experimental_zacas",
"experimental_zalasr",
"experimental_zicfilp",
"experimental_zicfiss",
"f",
"forced_atomics",
"forced_sw_shadow_stack",
"h",
"i",
"ld_add_fusion",
"lui_addi_fusion",
"m",
"no_default_unroll",
"no_rvc_hints",
"no_sink_splat_operands",
"no_trailing_seq_cst_fence",
"optimized_zero_stride_load",
"predictable_select_expensive",
"prefer_w_inst",
"relax",
"reserve_x1",
"reserve_x10",
"reserve_x11",
"reserve_x12",
"reserve_x13",
"reserve_x14",
"reserve_x15",
"reserve_x16",
"reserve_x17",
"reserve_x18",
"reserve_x19",
"reserve_x2",
"reserve_x20",
"reserve_x21",
"reserve_x22",
"reserve_x23",
"reserve_x24",
"reserve_x25",
"reserve_x26",
"reserve_x27",
"reserve_x28",
"reserve_x29",
"reserve_x3",
"reserve_x30",
"reserve_x31",
"reserve_x4",
"reserve_x5",
"reserve_x6",
"reserve_x7",
"reserve_x8",
"reserve_x9",
"rva20s64",
"rva20u64",
"rva22s64",
"rva22u64",
"rvi20u32",
"rvi20u64",
"save_restore",
"shcounterenw",
"shgatpa",
"shifted_zextw_fusion",
"short_forward_branch_opt",
"shtvala",
"shvsatpa",
"shvstvala",
"shvstvecd",
"smaia",
"smcdeleg",
"smcsrind",
"smepmp",
"smstateen",
"ssaia",
"ssccfg",
"ssccptr",
"sscofpmf",
"sscounterenw",
"sscsrind",
"ssstateen",
"ssstrict",
"sstc",
"sstvala",
"sstvecd",
"ssu64xl",
"svade",
"svadu",
"svbare",
"svinval",
"svnapot",
"svpbmt",
"tagged_globals",
"unaligned_scalar_mem",
"unaligned_vector_mem",
"use_postra_scheduler",
"v",
"ventana_veyron",
"xcvalu",
"xcvbi",
"xcvbitmanip",
"xcvelw",
"xcvmac",
"xcvmem",
"xcvsimd",
"xsfcease",
"xsfvcp",
"xsfvfnrclipxfqf",
"xsfvfwmaccqqq",
"xsfvqmaccdod",
"xsfvqmaccqoq",
"xsifivecdiscarddlone",
"xsifivecflushdlone",
"xtheadba",
"xtheadbb",
"xtheadbs",
"xtheadcmo",
"xtheadcondmov",
"xtheadfmemidx",
"xtheadmac",
"xtheadmemidx",
"xtheadmempair",
"xtheadsync",
"xtheadvdot",
"xventanacondops",
"xwchc",
"za128rs",
"za64rs",
"zaamo",
"zabha",
"zalrsc",
"zama16b",
"zawrs",
"zba",
"zbb",
"zbc",
"zbkb",
"zbkc",
"zbkx",
"zbs",
"zca",
"zcb",
"zcd",
"zce",
"zcf",
"zcmop",
"zcmp",
"zcmt",
"zdinx",
"zexth_fusion",
"zextw_fusion",
"zfa",
"zfbfmin",
"zfh",
"zfhmin",
"zfinx",
"zhinx",
"zhinxmin",
"zic64b",
"zicbom",
"zicbop",
"zicboz",
"ziccamoa",
"ziccif",
"zicclsm",
"ziccrse",
"zicntr",
"zicond",
"zicsr",
"zifencei",
"zihintntl",
"zihintpause",
"zihpm",
"zimop",
"zk",
"zkn",
"zknd",
"zkne",
"zknh",
"zkr",
"zks",
"zksed",
"zksh",
"zkt",
"zmmul",
"ztso",
"zvbb",
"zvbc",
"zve32f",
"zve32x",
"zve64d",
"zve64f",
"zve64x",
"zvfbfmin",
"zvfbfwma",
"zvfh",
"zvfhmin",
"zvkb",
"zvkg",
"zvkn",
"zvknc",
"zvkned",
"zvkng",
"zvknha",
"zvknhb",
"zvks",
"zvksc",
"zvksed",
"zvksg",
"zvksh",
"zvkt",
"zvl1024b",
"zvl128b",
"zvl16384b",
"zvl2048b",
"zvl256b",
"zvl32768b",
"zvl32b",
"zvl4096b",
"zvl512b",
"zvl64b",
"zvl65536b",
"zvl8192b",
},
.riscv64 = .{
"32bit",
"64bit",
"a",
"auipc_addi_fusion",
"b",
"c",
"conditional_cmv_fusion",
"d",
"dlen_factor_2",
"e",
"experimental",
"experimental_rva23s64",
"experimental_rva23u64",
"experimental_rvb23s64",
"experimental_rvb23u64",
"experimental_rvm23u32",
"experimental_smmpm",
"experimental_smnpm",
"experimental_ssnpm",
"experimental_sspm",
"experimental_ssqosid",
"experimental_supm",
"experimental_zacas",
"experimental_zalasr",
"experimental_zicfilp",
"experimental_zicfiss",
"f",
"forced_atomics",
"forced_sw_shadow_stack",
"h",
"i",
"ld_add_fusion",
"lui_addi_fusion",
"m",
"no_default_unroll",
"no_rvc_hints",
"no_sink_splat_operands",
"no_trailing_seq_cst_fence",
"optimized_zero_stride_load",
"predictable_select_expensive",
"prefer_w_inst",
"relax",
"reserve_x1",
"reserve_x10",
"reserve_x11",
"reserve_x12",
"reserve_x13",
"reserve_x14",
"reserve_x15",
"reserve_x16",
"reserve_x17",
"reserve_x18",
"reserve_x19",
"reserve_x2",
"reserve_x20",
"reserve_x21",
"reserve_x22",
"reserve_x23",
"reserve_x24",
"reserve_x25",
"reserve_x26",
"reserve_x27",
"reserve_x28",
"reserve_x29",
"reserve_x3",
"reserve_x30",
"reserve_x31",
"reserve_x4",
"reserve_x5",
"reserve_x6",
"reserve_x7",
"reserve_x8",
"reserve_x9",
"rva20s64",
"rva20u64",
"rva22s64",
"rva22u64",
"rvi20u32",
"rvi20u64",
"save_restore",
"shcounterenw",
"shgatpa",
"shifted_zextw_fusion",
"short_forward_branch_opt",
"shtvala",
"shvsatpa",
"shvstvala",
"shvstvecd",
"smaia",
"smcdeleg",
"smcsrind",
"smepmp",
"smstateen",
"ssaia",
"ssccfg",
"ssccptr",
"sscofpmf",
"sscounterenw",
"sscsrind",
"ssstateen",
"ssstrict",
"sstc",
"sstvala",
"sstvecd",
"ssu64xl",
"svade",
"svadu",
"svbare",
"svinval",
"svnapot",
"svpbmt",
"tagged_globals",
"unaligned_scalar_mem",
"unaligned_vector_mem",
"use_postra_scheduler",
"v",
"ventana_veyron",
"xcvalu",
"xcvbi",
"xcvbitmanip",
"xcvelw",
"xcvmac",
"xcvmem",
"xcvsimd",
"xsfcease",
"xsfvcp",
"xsfvfnrclipxfqf",
"xsfvfwmaccqqq",
"xsfvqmaccdod",
"xsfvqmaccqoq",
"xsifivecdiscarddlone",
"xsifivecflushdlone",
"xtheadba",
"xtheadbb",
"xtheadbs",
"xtheadcmo",
"xtheadcondmov",
"xtheadfmemidx",
"xtheadmac",
"xtheadmemidx",
"xtheadmempair",
"xtheadsync",
"xtheadvdot",
"xventanacondops",
"xwchc",
"za128rs",
"za64rs",
"zaamo",
"zabha",
"zalrsc",
"zama16b",
"zawrs",
"zba",
"zbb",
"zbc",
"zbkb",
"zbkc",
"zbkx",
"zbs",
"zca",
"zcb",
"zcd",
"zce",
"zcf",
"zcmop",
"zcmp",
"zcmt",
"zdinx",
"zexth_fusion",
"zextw_fusion",
"zfa",
"zfbfmin",
"zfh",
"zfhmin",
"zfinx",
"zhinx",
"zhinxmin",
"zic64b",
"zicbom",
"zicbop",
"zicboz",
"ziccamoa",
"ziccif",
"zicclsm",
"ziccrse",
"zicntr",
"zicond",
"zicsr",
"zifencei",
"zihintntl",
"zihintpause",
"zihpm",
"zimop",
"zk",
"zkn",
"zknd",
"zkne",
"zknh",
"zkr",
"zks",
"zksed",
"zksh",
"zkt",
"zmmul",
"ztso",
"zvbb",
"zvbc",
"zve32f",
"zve32x",
"zve64d",
"zve64f",
"zve64x",
"zvfbfmin",
"zvfbfwma",
"zvfh",
"zvfhmin",
"zvkb",
"zvkg",
"zvkn",
"zvknc",
"zvkned",
"zvkng",
"zvknha",
"zvknhb",
"zvks",
"zvksc",
"zvksed",
"zvksg",
"zvksh",
"zvkt",
"zvl1024b",
"zvl128b",
"zvl16384b",
"zvl2048b",
"zvl256b",
"zvl32768b",
"zvl32b",
"zvl4096b",
"zvl512b",
"zvl64b",
"zvl65536b",
"zvl8192b",
},
.s390x = .{
"backchain",
"bear_enhancement",
"deflate_conversion",
"dfp_packed_conversion",
"dfp_zoned_conversion",
"distinct_ops",
"enhanced_dat_2",
"enhanced_sort",
"execution_hint",
"fast_serialization",
"fp_extension",
"guarded_storage",
"high_word",
"insert_reference_bits_multiple",
"interlocked_access1",
"load_and_trap",
"load_and_zero_rightmost_byte",
"load_store_on_cond",
"load_store_on_cond_2",
"message_security_assist_extension3",
"message_security_assist_extension4",
"message_security_assist_extension5",
"message_security_assist_extension7",
"message_security_assist_extension8",
"message_security_assist_extension9",
"miscellaneous_extensions",
"miscellaneous_extensions_2",
"miscellaneous_extensions_3",
"nnp_assist",
"population_count",
"processor_activity_instrumentation",
"processor_assist",
"reset_dat_protection",
"reset_reference_bits_multiple",
"soft_float",
"test_pending_external_interruption",
"transactional_execution",
"unaligned_symbols",
"vector",
"vector_enhancements_1",
"vector_enhancements_2",
"vector_packed_decimal",
"vector_packed_decimal_enhancement",
"vector_packed_decimal_enhancement_2",
},
.sparc = .{
"deprecated_v8",
"detectroundchange",
"fixallfdivsqrt",
"hard_quad_float",
"hasleoncasa",
"hasumacsmac",
"insertnopload",
"leon",
"leoncyclecounter",
"leonpwrpsr",
"no_fmuls",
"no_fsmuld",
"popc",
"reserve_g1",
"reserve_g2",
"reserve_g3",
"reserve_g4",
"reserve_g5",
"reserve_g6",
"reserve_g7",
"reserve_i0",
"reserve_i1",
"reserve_i2",
"reserve_i3",
"reserve_i4",
"reserve_i5",
"reserve_l0",
"reserve_l1",
"reserve_l2",
"reserve_l3",
"reserve_l4",
"reserve_l5",
"reserve_l6",
"reserve_l7",
"reserve_o0",
"reserve_o1",
"reserve_o2",
"reserve_o3",
"reserve_o4",
"reserve_o5",
"slow_rdpc",
"soft_float",
"soft_mul_div",
"v9",
"vis",
"vis2",
"vis3",
},
.sparc64 = .{
"deprecated_v8",
"detectroundchange",
"fixallfdivsqrt",
"hard_quad_float",
"hasleoncasa",
"hasumacsmac",
"insertnopload",
"leon",
"leoncyclecounter",
"leonpwrpsr",
"no_fmuls",
"no_fsmuld",
"popc",
"reserve_g1",
"reserve_g2",
"reserve_g3",
"reserve_g4",
"reserve_g5",
"reserve_g6",
"reserve_g7",
"reserve_i0",
"reserve_i1",
"reserve_i2",
"reserve_i3",
"reserve_i4",
"reserve_i5",
"reserve_l0",
"reserve_l1",
"reserve_l2",
"reserve_l3",
"reserve_l4",
"reserve_l5",
"reserve_l6",
"reserve_l7",
"reserve_o0",
"reserve_o1",
"reserve_o2",
"reserve_o3",
"reserve_o4",
"reserve_o5",
"slow_rdpc",
"soft_float",
"soft_mul_div",
"v9",
"vis",
"vis2",
"vis3",
},
.spirv = .{
"v1_0",
"v1_1",
"v1_2",
"v1_3",
"v1_4",
"v1_5",
"v1_6",
"int8",
"int16",
"int64",
"float16",
"float64",
"addresses",
"matrix",
"storage_push_constant16",
"kernel",
"generic_pointer",
"vector16",
"shader",
},
.spirv32 = .{
"v1_0",
"v1_1",
"v1_2",
"v1_3",
"v1_4",
"v1_5",
"v1_6",
"int8",
"int16",
"int64",
"float16",
"float64",
"addresses",
"matrix",
"storage_push_constant16",
"kernel",
"generic_pointer",
"vector16",
"shader",
},
.spirv64 = .{
"v1_0",
"v1_1",
"v1_2",
"v1_3",
"v1_4",
"v1_5",
"v1_6",
"int8",
"int16",
"int64",
"float16",
"float64",
"addresses",
"matrix",
"storage_push_constant16",
"kernel",
"generic_pointer",
"vector16",
"shader",
},
.ve = .{
"vpu",
},
.wasm32 = .{
"atomics",
"bulk_memory",
"exception_handling",
"extended_const",
"half_precision",
"multimemory",
"multivalue",
"mutable_globals",
"nontrapping_bulk_memory_len0",
"nontrapping_fptoint",
"reference_types",
"relaxed_simd",
"sign_ext",
"simd128",
"tail_call",
},
.wasm64 = .{
"atomics",
"bulk_memory",
"exception_handling",
"extended_const",
"half_precision",
"multimemory",
"multivalue",
"mutable_globals",
"nontrapping_bulk_memory_len0",
"nontrapping_fptoint",
"reference_types",
"relaxed_simd",
"sign_ext",
"simd128",
"tail_call",
},
.x86 = .{
"16bit_mode",
"32bit_mode",
"3dnow",
"3dnowa",
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"amx_bf16",
"amx_complex",
"amx_fp16",
"amx_int8",
"amx_tile",
"avx",
"avx10_1_256",
"avx10_1_512",
"avx2",
"avx512bf16",
"avx512bitalg",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512er",
"avx512f",
"avx512fp16",
"avx512ifma",
"avx512pf",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vp2intersect",
"avx512vpopcntdq",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint16",
"avxvnniint8",
"bmi",
"bmi2",
"branch_hint",
"branchfusion",
"bsf_bsr_0_clobbers_result",
"ccmp",
"cf",
"cldemote",
"clflushopt",
"clwb",
"clzero",
"cmov",
"cmpccxadd",
"crc32",
"cx16",
"cx8",
"egpr",
"enqcmd",
"ermsb",
"evex512",
"f16c",
"false_deps_getmant",
"false_deps_lzcnt_tzcnt",
"false_deps_mulc",
"false_deps_mullq",
"false_deps_perm",
"false_deps_popcnt",
"false_deps_range",
"fast_11bytenop",
"fast_15bytenop",
"fast_7bytenop",
"fast_bextr",
"fast_dpwssd",
"fast_gather",
"fast_hops",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fast_vector_shift_masks",
"faster_shift_than_shuffle",
"fma",
"fma4",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"harden_sls_ijmp",
"harden_sls_ret",
"hreset",
"idivl_to_divb",
"idivq_to_divl",
"inline_asm_use_gpr32",
"invpcid",
"kl",
"lea_sp",
"lea_uses_ag",
"lvi_cfi",
"lvi_load_hardening",
"lwp",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"mwaitx",
"ndd",
"nf",
"no_bypass_delay",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pad_short_functions",
"pclmul",
"pconfig",
"pku",
"popcnt",
"ppx",
"prefer_128_bit",
"prefer_256_bit",
"prefer_mask_registers",
"prefer_movmsk_over_vtest",
"prefer_no_gather",
"prefer_no_scatter",
"prefetchi",
"prefetchwt1",
"prfchw",
"ptwrite",
"push2pop2",
"raoint",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"retpoline",
"retpoline_external_thunk",
"retpoline_indirect_branches",
"retpoline_indirect_calls",
"rtm",
"sahf",
"sbb_dep_breaking",
"serialize",
"seses",
"sgx",
"sha",
"sha512",
"shstk",
"slow_3ops_lea",
"slow_incdec",
"slow_lea",
"slow_pmaddwd",
"slow_pmulld",
"slow_shld",
"slow_two_mem_ops",
"slow_unaligned_mem_16",
"slow_unaligned_mem_32",
"sm3",
"sm4",
"smap",
"smep",
"soft_float",
"sse",
"sse2",
"sse3",
"sse4_1",
"sse4_2",
"sse4a",
"sse_unaligned_mem",
"ssse3",
"tagged_globals",
"tbm",
"tsxldtrk",
"tuning_fast_imm_vector_shift",
"uintr",
"use_glm_div_sqrt_costs",
"use_slm_arith_costs",
"usermsr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"wbnoinvd",
"widekl",
"x87",
"xop",
"xsave",
"xsavec",
"xsaveopt",
"xsaves",
"zu",
},
.x86_64 = .{
"16bit_mode",
"32bit_mode",
"3dnow",
"3dnowa",
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"amx_bf16",
"amx_complex",
"amx_fp16",
"amx_int8",
"amx_tile",
"avx",
"avx10_1_256",
"avx10_1_512",
"avx2",
"avx512bf16",
"avx512bitalg",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512er",
"avx512f",
"avx512fp16",
"avx512ifma",
"avx512pf",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vp2intersect",
"avx512vpopcntdq",
"avxifma",
"avxneconvert",
"avxvnni",
"avxvnniint16",
"avxvnniint8",
"bmi",
"bmi2",
"branch_hint",
"branchfusion",
"bsf_bsr_0_clobbers_result",
"ccmp",
"cf",
"cldemote",
"clflushopt",
"clwb",
"clzero",
"cmov",
"cmpccxadd",
"crc32",
"cx16",
"cx8",
"egpr",
"enqcmd",
"ermsb",
"evex512",
"f16c",
"false_deps_getmant",
"false_deps_lzcnt_tzcnt",
"false_deps_mulc",
"false_deps_mullq",
"false_deps_perm",
"false_deps_popcnt",
"false_deps_range",
"fast_11bytenop",
"fast_15bytenop",
"fast_7bytenop",
"fast_bextr",
"fast_dpwssd",
"fast_gather",
"fast_hops",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_shld_rotate",
"fast_variable_crosslane_shuffle",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fast_vector_shift_masks",
"faster_shift_than_shuffle",
"fma",
"fma4",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"harden_sls_ijmp",
"harden_sls_ret",
"hreset",
"idivl_to_divb",
"idivq_to_divl",
"inline_asm_use_gpr32",
"invpcid",
"kl",
"lea_sp",
"lea_uses_ag",
"lvi_cfi",
"lvi_load_hardening",
"lwp",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"movdir64b",
"movdiri",
"mwaitx",
"ndd",
"nf",
"no_bypass_delay",
"no_bypass_delay_blend",
"no_bypass_delay_mov",
"no_bypass_delay_shuffle",
"nopl",
"pad_short_functions",
"pclmul",
"pconfig",
"pku",
"popcnt",
"ppx",
"prefer_128_bit",
"prefer_256_bit",
"prefer_mask_registers",
"prefer_movmsk_over_vtest",
"prefer_no_gather",
"prefer_no_scatter",
"prefetchi",
"prefetchwt1",
"prfchw",
"ptwrite",
"push2pop2",
"raoint",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"retpoline",
"retpoline_external_thunk",
"retpoline_indirect_branches",
"retpoline_indirect_calls",
"rtm",
"sahf",
"sbb_dep_breaking",
"serialize",
"seses",
"sgx",
"sha",
"sha512",
"shstk",
"slow_3ops_lea",
"slow_incdec",
"slow_lea",
"slow_pmaddwd",
"slow_pmulld",
"slow_shld",
"slow_two_mem_ops",
"slow_unaligned_mem_16",
"slow_unaligned_mem_32",
"sm3",
"sm4",
"smap",
"smep",
"soft_float",
"sse",
"sse2",
"sse3",
"sse4_1",
"sse4_2",
"sse4a",
"sse_unaligned_mem",
"ssse3",
"tagged_globals",
"tbm",
"tsxldtrk",
"tuning_fast_imm_vector_shift",
"uintr",
"use_glm_div_sqrt_costs",
"use_slm_arith_costs",
"usermsr",
"vaes",
"vpclmulqdq",
"vzeroupper",
"waitpkg",
"wbnoinvd",
"widekl",
"x87",
"xop",
"xsave",
"xsavec",
"xsaveopt",
"xsaves",
"zu",
},
.xcore = .{},
.xtensa = .{
"density",
},
},
.native = .{
.triple = "x86_64-windows.win11_dt...win11_dt-gnu",
.cpu = .{
.arch = "x86_64",
.name = "znver4",
.features = .{
"64bit",
"adx",
"aes",
"allow_light_256_bit",
"avx",
"avx2",
"avx512bf16",
"avx512bitalg",
"avx512bw",
"avx512cd",
"avx512dq",
"avx512f",
"avx512ifma",
"avx512vbmi",
"avx512vbmi2",
"avx512vl",
"avx512vnni",
"avx512vpopcntdq",
"bmi",
"bmi2",
"branchfusion",
"clflushopt",
"clwb",
"clzero",
"cmov",
"crc32",
"cx16",
"cx8",
"evex512",
"f16c",
"fast_15bytenop",
"fast_bextr",
"fast_dpwssd",
"fast_imm16",
"fast_lzcnt",
"fast_movbe",
"fast_scalar_fsqrt",
"fast_scalar_shift_masks",
"fast_variable_perlane_shuffle",
"fast_vector_fsqrt",
"fma",
"fsgsbase",
"fsrm",
"fxsr",
"gfni",
"idivq_to_divl",
"invpcid",
"lzcnt",
"macrofusion",
"mmx",
"movbe",
"mwaitx",
"nopl",
"pclmul",
"popcnt",
"prfchw",
"rdpid",
"rdpru",
"rdrnd",
"rdseed",
"sahf",
"sbb_dep_breaking",
"sha",
"shstk",
"slow_shld",
"smap",
"smep",
"sse",
"sse2",
"sse3",
"sse4_1",
"sse4_2",
"sse4a",
"ssse3",
"vaes",
"vpclmulqdq",
"vzeroupper",
"wbnoinvd",
"x87",
"xsave",
"xsavec",
"xsaveopt",
"xsaves",
},
},
.os = "windows",
.abi = "gnu",
},
}